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| Format: | Preprint |
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2026
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| Online-Zugang: | https://arxiv.org/abs/2604.03144 |
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| author | Yang, Jian Zhang, Wei Wu, Jiajun Cheng, Junhang Zheng, Tuney Xu, Fanglin Gu, Weicheng Jing, Lin Du, Yaxin Li, Joseph Li, Yizhi Xing, Yan Hao, Chuan Tao, Ran Gong, Ruihao Liu, Aishan Li, Zhoujun Tang, Mingjie Lin, Chenghua Chen, Siheng Zhao, Wayne Xin Liu, Xianglong Zhou, Ming Dai, Bryan Lv, Weifeng |
| author_facet | Yang, Jian Zhang, Wei Wu, Jiajun Cheng, Junhang Zheng, Tuney Xu, Fanglin Gu, Weicheng Jing, Lin Du, Yaxin Li, Joseph Li, Yizhi Xing, Yan Hao, Chuan Tao, Ran Gong, Ruihao Liu, Aishan Li, Zhoujun Tang, Mingjie Lin, Chenghua Chen, Siheng Zhao, Wayne Xin Liu, Xianglong Zhou, Ming Dai, Bryan Lv, Weifeng |
| contents | Industrial software development across chip design, GPU optimization, and embedded systems lacks expert reasoning traces showing how engineers reason about hardware constraints and timing semantics. In this work, we propose InCoder-32B-Thinking, trained on the data from the Error-driven Chain-of-Thought (ECoT) synthesis framework with an industrial code world model (ICWM) to generate reasoning traces. Specifically, ECoT generates reasoning chains by synthesizing the thinking content from multi-turn dialogue with environmental error feedback, explicitly modeling the error-correction process. ICWM is trained on domain-specific execution traces from Verilog simulation, GPU profiling, etc., learns the causal dynamics of how code affects hardware behavior, and enables self-verification by predicting execution outcomes before actual compilation. All synthesized reasoning traces are validated through domain toolchains, creating training data matching the natural reasoning depth distribution of industrial tasks. Evaluation on 14 general (81.3% on LiveCodeBench v5) and 9 industrial benchmarks (84.0% in CAD-Coder and 38.0% on KernelBench) shows InCoder-32B-Thinking achieves top-tier open-source results across all domains.GPU Optimization |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_03144 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | InCoder-32B-Thinking: Industrial Code World Model for Thinking Yang, Jian Zhang, Wei Wu, Jiajun Cheng, Junhang Zheng, Tuney Xu, Fanglin Gu, Weicheng Jing, Lin Du, Yaxin Li, Joseph Li, Yizhi Xing, Yan Hao, Chuan Tao, Ran Gong, Ruihao Liu, Aishan Li, Zhoujun Tang, Mingjie Lin, Chenghua Chen, Siheng Zhao, Wayne Xin Liu, Xianglong Zhou, Ming Dai, Bryan Lv, Weifeng Hardware Architecture Artificial Intelligence Computation and Language Industrial software development across chip design, GPU optimization, and embedded systems lacks expert reasoning traces showing how engineers reason about hardware constraints and timing semantics. In this work, we propose InCoder-32B-Thinking, trained on the data from the Error-driven Chain-of-Thought (ECoT) synthesis framework with an industrial code world model (ICWM) to generate reasoning traces. Specifically, ECoT generates reasoning chains by synthesizing the thinking content from multi-turn dialogue with environmental error feedback, explicitly modeling the error-correction process. ICWM is trained on domain-specific execution traces from Verilog simulation, GPU profiling, etc., learns the causal dynamics of how code affects hardware behavior, and enables self-verification by predicting execution outcomes before actual compilation. All synthesized reasoning traces are validated through domain toolchains, creating training data matching the natural reasoning depth distribution of industrial tasks. Evaluation on 14 general (81.3% on LiveCodeBench v5) and 9 industrial benchmarks (84.0% in CAD-Coder and 38.0% on KernelBench) shows InCoder-32B-Thinking achieves top-tier open-source results across all domains.GPU Optimization |
| title | InCoder-32B-Thinking: Industrial Code World Model for Thinking |
| topic | Hardware Architecture Artificial Intelligence Computation and Language |
| url | https://arxiv.org/abs/2604.03144 |