Area Optimization of Open-Source Low-Power INA in 130nm CMOS using Hybrid Mixed-Variable PSO

Fuente: arXiv
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Hauptverfasser: Herath, Avishka, Luckshan, Chanula, Katugaha, Lochana, Mendis, Udara, Wickremasinghe, Kithmin
Format: Preprint
Veröffentlicht: 2026
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author Herath, Avishka
Luckshan, Chanula
Katugaha, Lochana
Mendis, Udara
Wickremasinghe, Kithmin
author_facet Herath, Avishka
Luckshan, Chanula
Katugaha, Lochana
Mendis, Udara
Wickremasinghe, Kithmin
contents As open-source silicon initiatives democratize access to integrated circuit development using multi-project environments, silicon area has become a premium resource. However, minimizing this layout area traditionally forces designers to compromise on core performance specifications. To address this challenge, this paper presents an open-source framework based on a hybrid mixed-variable particle swarm optimization algorithm and the gm/ID methodology to minimize the layout area of complex analog circuits while meeting design requirements. The framework's efficacy is demonstrated by designing a low-power instrumentation amplifier that achieves a 90.33% reduction in gate area over existing implementations.
format Preprint
id arxiv_https___arxiv_org_abs_2604_04213
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Area Optimization of Open-Source Low-Power INA in 130nm CMOS using Hybrid Mixed-Variable PSO
Herath, Avishka
Luckshan, Chanula
Katugaha, Lochana
Mendis, Udara
Wickremasinghe, Kithmin
Systems and Control
As open-source silicon initiatives democratize access to integrated circuit development using multi-project environments, silicon area has become a premium resource. However, minimizing this layout area traditionally forces designers to compromise on core performance specifications. To address this challenge, this paper presents an open-source framework based on a hybrid mixed-variable particle swarm optimization algorithm and the gm/ID methodology to minimize the layout area of complex analog circuits while meeting design requirements. The framework's efficacy is demonstrated by designing a low-power instrumentation amplifier that achieves a 90.33% reduction in gate area over existing implementations.
title Area Optimization of Open-Source Low-Power INA in 130nm CMOS using Hybrid Mixed-Variable PSO
topic Systems and Control
url https://arxiv.org/abs/2604.04213