Copertina

NEURA: A Unified and Retargetable Compilation Framework for Coarse-Grained Reconfigurable Architectures

Fuente: arXiv

Salvato in:

Dettagli Bibliografici
Autori principali:	Li, Shangkun, Ge, Jinming, Tao, Diyuan, Li, Zeyu, Liang, Jiawei, Du, Linfeng, Xu, Jiang, Zhang, Wei, Tan, Cheng
Natura:	Preprint
Pubblicazione:	2026
Soggetti:	Programming Languages Hardware Architecture
Accesso online:	Acceder al recurso
Tags:	Aggiungi Tag Nessun Tag, puoi essere il primo ad aggiungerne!!

Documenti analoghi

NEURA: A Unified and Retargetable Compilation Framework for Coarse-Grained Reconfigurable Architectures
di: Li, Shangkun, et al.
Pubblicazione: (2026)

Capstone: Power-Capped Pipelining for Coarse-Grained Reconfigurable Array Compilers
di: Yarzada, Sabrina, et al.
Pubblicazione: (2026)

SAT-MapIt: A SAT-based Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures
di: Tirelli, Cristian, et al.
Pubblicazione: (2025)

HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays
di: Du, Alan Jia Bao, et al.
Pubblicazione: (2025)

DICE: Enabling Efficient General-Purpose SIMT Execution with Statically Scheduled Coarse-Grained Reconfigurable Arrays
di: Wang, Jiayi, et al.
Pubblicazione: (2026)

Mapping code on Coarse Grained Reconfigurable Arrays using a SAT solver
di: Tirelli, Cristian, et al.
Pubblicazione: (2025)

FILCO: Flexible Composing Architecture with Real-Time Reconfigurability for DNN Acceleration
di: Chen, Xingzhen, et al.
Pubblicazione: (2026)

HERO: Hardware-Efficient RL-based Optimization Framework for NeRF Quantization
di: Zhang, Yipu, et al.
Pubblicazione: (2025)

An FPGA Compiler for On-the-Fly Adaptive CNN Deployment and Reconfiguration
di: Mazouz, Alaa, et al.
Pubblicazione: (2025)

Benchmarking and Dissecting the Nvidia Hopper GPU Architecture
di: Luo, Weile, et al.
Pubblicazione: (2024)

VersaQ-3D: A Reconfigurable Accelerator Enabling Feed-Forward and Generalizable 3D Reconstruction via Versatile Quantization
di: Zhang, Yipu, et al.
Pubblicazione: (2026)

DRACO: Co-design for DSP-Efficient Rigid Body Dynamics Accelerator
di: Liu, Xingyu, et al.
Pubblicazione: (2025)

ReDas: A Lightweight Architecture for Supporting Fine-Grained Reshaping and Multiple Dataflows on Systolic Array
di: Han, Meng, et al.
Pubblicazione: (2023)

Building a Reusable and Extensible Automatic Compiler Infrastructure for Reconfigurable Devices
di: Zang, Zhenya, et al.
Pubblicazione: (2023)

Reconfigurable Stream Network Architecture
di: Wang, Chengyue, et al.
Pubblicazione: (2024)

Nexus Machine: An Active Message Inspired Reconfigurable Architecture for Irregular Workloads
di: Juneja, Rohan, et al.
Pubblicazione: (2025)

Hermes: A Unified High-Performance NTT Architecture with Hybrid Dataflow
di: Gu, Hang, et al.
Pubblicazione: (2026)

FireFly-S: Exploiting Dual-Side Sparsity for Spiking Neural Networks Acceleration with Reconfigurable Spatial Architecture
di: Li, Tenglong, et al.
Pubblicazione: (2024)

GCC: A 3DGS Inference Architecture with Gaussian-Wise and Cross-Stage Conditional Processing
di: Pei, Minnan, et al.
Pubblicazione: (2025)

PowerFlow-DNN: Compiler-Directed Fine-Grained Power Orchestration for End-to-End Edge AI Inference
di: Chen, Paul, et al.
Pubblicazione: (2026)

Evolution, Challenges, and Optimization in Computer Architecture: The Role of Reconfigurable Systems
di: Ederhion, Jefferson, et al.
Pubblicazione: (2024)

A Switch-Centric In-Network Architecture for Accelerating LLM Inference in Shared-Memory Network
di: Jiang, Aojie, et al.
Pubblicazione: (2026)

Guac: Energy-Aware and SSA-Based Generation of Coarse-Grained Merged Accelerators from LLVM-IR
di: Brumar, Iulian, et al.
Pubblicazione: (2024)

DORA: Dataflow-Instruction Orchestration Architecture for DNN Acceleration
di: Chen, Xingzhen, et al.
Pubblicazione: (2026)

Overmind NSA: A Unified Neuro-Symbolic Computing Architecture with Approximate Nonlinear Activations and Preemptive Memory Bypass
di: Wang, Weilun, et al.
Pubblicazione: (2026)

FPPS: An FPGA-Based Point Cloud Processing System
di: Zhou, Xiaofeng, et al.
Pubblicazione: (2026)

elasticAI.explorer: Towards a Unified End-to-End Framework for Hardware-Aware Neural Architecture Search
di: Maman, Natalie, et al.
Pubblicazione: (2026)

A Reconfigurable Framework for AI-FPGA Agent Integration and Acceleration
di: Yunusoglu, Aybars, et al.
Pubblicazione: (2026)

A Dataflow Compiler for Efficient LLM Inference using Custom Microscaling Formats
di: Cheng, Jianyi, et al.
Pubblicazione: (2023)

CODO: An Automated Compiler for Comprehensive Dataflow Optimization
di: Zhang, Weichuang, et al.
Pubblicazione: (2026)

PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators
di: Sun, Xiaotian, et al.
Pubblicazione: (2024)

Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators
di: Zhao, Shixin, et al.
Pubblicazione: (2025)

OpenACM: An Open-Source SRAM-Based Approximate CiM Compiler
di: Zhou, Yiqi, et al.
Pubblicazione: (2026)

UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators
di: Zuo, Dongsheng, et al.
Pubblicazione: (2024)

MINISA: Minimal Instruction Set Architecture for Next-gen Reconfigurable Inference Accelerator
di: Tong, Jianming, et al.
Pubblicazione: (2026)

A Scalable and Robust Compilation Framework for Emitter-Photonic Graph State
di: Ren, Xiangyu, et al.
Pubblicazione: (2025)

UniCAIM: A Unified CAM/CIM Architecture with Static-Dynamic KV Cache Pruning for Efficient Long-Context LLM Inference
di: Xu, Weikai, et al.
Pubblicazione: (2025)

FlexMem: High-Parallel Near-Memory Architecture for Flexible Dataflow in Fully Homomorphic Encryption
di: Shi, Shangyi, et al.
Pubblicazione: (2025)

FETTA: Flexible and Efficient Hardware Accelerator for Tensorized Neural Network Training
di: Lu, Jinming, et al.
Pubblicazione: (2025)

ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework
di: Zhang, Qijun, et al.
Pubblicazione: (2025)