MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs
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arXiv
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| Autores principales: | , , , , , , , , |
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| Formato: | Preprint |
| Publicado: |
2026
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| _version_ | 1866915929869254656 |
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| author | Russo, Enrico Hamdi, Mohamed Amine Ottaviano, Alessandro Conti, Francesco Garofalo, Angelo Pagliari, Daniele Jahier Palesi, Maurizio Benini, Luca Burrello, Alessio |
| author_facet | Russo, Enrico Hamdi, Mohamed Amine Ottaviano, Alessandro Conti, Francesco Garofalo, Angelo Pagliari, Daniele Jahier Palesi, Maurizio Benini, Luca Burrello, Alessio |
| contents | Deploying DNNs on System-on-Chips (SoC) with multiple heterogeneous acceleration engines is challenging, and the majority of deployment frameworks cannot fully exploit heterogeneity. We present MATCHA, a unified DNN deployment framework that generates highly concurrent schedules for parallel, heterogeneous accelerators and uses constraint programming to optimize L3/L2 memory allocation and scheduling. Using pattern matching, tiling, and mapping across individual HW units enables parallel execution and high accelerator utilization. On the MLPerf Tiny benchmark, using a SoC with two heterogeneous accelerators, MATCHA improves accelerator utilization and reduces inference latency by up to 35% with respect to the the state-of-the-art MATCH compiler. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_09124 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs Russo, Enrico Hamdi, Mohamed Amine Ottaviano, Alessandro Conti, Francesco Garofalo, Angelo Pagliari, Daniele Jahier Palesi, Maurizio Benini, Luca Burrello, Alessio Distributed, Parallel, and Cluster Computing Hardware Architecture Machine Learning Deploying DNNs on System-on-Chips (SoC) with multiple heterogeneous acceleration engines is challenging, and the majority of deployment frameworks cannot fully exploit heterogeneity. We present MATCHA, a unified DNN deployment framework that generates highly concurrent schedules for parallel, heterogeneous accelerators and uses constraint programming to optimize L3/L2 memory allocation and scheduling. Using pattern matching, tiling, and mapping across individual HW units enables parallel execution and high accelerator utilization. On the MLPerf Tiny benchmark, using a SoC with two heterogeneous accelerators, MATCHA improves accelerator utilization and reduces inference latency by up to 35% with respect to the the state-of-the-art MATCH compiler. |
| title | MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs |
| topic | Distributed, Parallel, and Cluster Computing Hardware Architecture Machine Learning |
| url | https://arxiv.org/abs/2604.09124 |