Quantum Error Mitigation Strategies for Variational PDE-Constrained Circuits on Noisy Hardware
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arXiv
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| Format: | Preprint |
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2026
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| author | Hewage, Prasad Nimantha Madusanka Ukwatta Chakkravarthy, Midhun Abeysekara, Ruvan Kumara |
| author_facet | Hewage, Prasad Nimantha Madusanka Ukwatta Chakkravarthy, Midhun Abeysekara, Ruvan Kumara |
| contents | Variational quantum circuits (VQCs) solving partial differential equations (PDEs) on near-term quantum hardware face a critical challenge: hardware noise degrades solution fidelity and disrupts convergence. We present a systematic study of three noise channels; depolarizing, amplitude damping, and bit-flip on VQCs constrained by PDE residual loss functions for the heat equation, Burgers' equation, and the Saint-Venant shallow water equations. We benchmark three error mitigation strategies: zero-noise extrapolation (ZNE) via Richardson polynomial fitting, probabilistic error cancellation (PEC), and measurement error mitigation through inverse confusion matrices. Our numerical experiments on 6-qubit, 4-layer circuits demonstrate that ZNE reduces absolute error by 82-96% at low noise (p = 0.001), with effectiveness degrading gracefully at higher noise strengths. We prove analytically and confirm numerically that physics-constrained circuits exhibit inherent noise resilience: at p = 0.01, constrained circuits maintain 25-47% higher fidelity than unconstrained counterparts, with the advantage scaling with PDE complexity. PEC provides near-exact correction at low gate counts but incurs exponential sampling overhead, rendering it impractical beyond ~60 gates at p >= 0.02. Error budget decomposition reveals that systematic errors dominate at all noise levels (43-58%), while the PDE residual component grows from ~10% to ~31% as noise increases, indicating that physics constraints absorb noise through structured gradient information. These results establish practical guidelines for deploying variational PDE solvers on NISQ hardware. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_10099 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Quantum Error Mitigation Strategies for Variational PDE-Constrained Circuits on Noisy Hardware Hewage, Prasad Nimantha Madusanka Ukwatta Chakkravarthy, Midhun Abeysekara, Ruvan Kumara Quantum Physics 81Q80, 65M99, 81P68 Variational quantum circuits (VQCs) solving partial differential equations (PDEs) on near-term quantum hardware face a critical challenge: hardware noise degrades solution fidelity and disrupts convergence. We present a systematic study of three noise channels; depolarizing, amplitude damping, and bit-flip on VQCs constrained by PDE residual loss functions for the heat equation, Burgers' equation, and the Saint-Venant shallow water equations. We benchmark three error mitigation strategies: zero-noise extrapolation (ZNE) via Richardson polynomial fitting, probabilistic error cancellation (PEC), and measurement error mitigation through inverse confusion matrices. Our numerical experiments on 6-qubit, 4-layer circuits demonstrate that ZNE reduces absolute error by 82-96% at low noise (p = 0.001), with effectiveness degrading gracefully at higher noise strengths. We prove analytically and confirm numerically that physics-constrained circuits exhibit inherent noise resilience: at p = 0.01, constrained circuits maintain 25-47% higher fidelity than unconstrained counterparts, with the advantage scaling with PDE complexity. PEC provides near-exact correction at low gate counts but incurs exponential sampling overhead, rendering it impractical beyond ~60 gates at p >= 0.02. Error budget decomposition reveals that systematic errors dominate at all noise levels (43-58%), while the PDE residual component grows from ~10% to ~31% as noise increases, indicating that physics constraints absorb noise through structured gradient information. These results establish practical guidelines for deploying variational PDE solvers on NISQ hardware. |
| title | Quantum Error Mitigation Strategies for Variational PDE-Constrained Circuits on Noisy Hardware |
| topic | Quantum Physics 81Q80, 65M99, 81P68 |
| url | https://arxiv.org/abs/2604.10099 |