Resilient and Effort-Optimal Controller Synthesis under Temporal Logic Specifications
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arXiv
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| Main Authors: | Si, Youssef Ait, Das, Ratnangshu, Monir, Negar, Soudjani, Sadegh, Jagtap, Pushpak, Saoud, Adnane |
|---|---|
| Format: | Preprint |
| Published: |
2026
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| Online Access: | |
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