Different Perspectives of Memory System Simulation
Fuente:
arXiv
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| Autori principali: | , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| Soggetti: | |
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| _version_ | 1866910143492390912 |
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| author | Esmaili-Dokht, Pouya Yadegari, Arash Xirau, Victor Pavon, Julian Cristal, Adrian Ayguade, Eduard Radojkovic, Petar |
| author_facet | Esmaili-Dokht, Pouya Yadegari, Arash Xirau, Victor Pavon, Julian Cristal, Adrian Ayguade, Eduard Radojkovic, Petar |
| contents | Memory simulators are used to estimate application performance on advanced memory systems, yet they may exhibit significant discrepancies compared to real hardware. This paper investigates two key questions: (1) what causes these inaccuracies, and (2) how can simulators be properly validated to ensure reliable performance predictions. We propose a methodology that evaluates memory performance from three complementary perspectives: the memory simulator, the CPU-memory interface, and the application. Our analysis reveals that these perspectives can diverge substantially, with application-level performance often decoupled from internal simulator statistics. We identify the CPU-memory interface as the primary source of these inaccuracies. To address these problems, we implement a set of corrections and enhancements that improve the fidelity of integrated simulators. We evaluate these changes across multiple widely used simulators, including Ramulator, Ramulator 2, and DRAMsim3 integrated with ZSim. The results show that correcting interface-related issues is essential to achieve simulation outcomes that closely resemble actual system performance. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_16965 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Different Perspectives of Memory System Simulation Esmaili-Dokht, Pouya Yadegari, Arash Xirau, Victor Pavon, Julian Cristal, Adrian Ayguade, Eduard Radojkovic, Petar Hardware Architecture Memory simulators are used to estimate application performance on advanced memory systems, yet they may exhibit significant discrepancies compared to real hardware. This paper investigates two key questions: (1) what causes these inaccuracies, and (2) how can simulators be properly validated to ensure reliable performance predictions. We propose a methodology that evaluates memory performance from three complementary perspectives: the memory simulator, the CPU-memory interface, and the application. Our analysis reveals that these perspectives can diverge substantially, with application-level performance often decoupled from internal simulator statistics. We identify the CPU-memory interface as the primary source of these inaccuracies. To address these problems, we implement a set of corrections and enhancements that improve the fidelity of integrated simulators. We evaluate these changes across multiple widely used simulators, including Ramulator, Ramulator 2, and DRAMsim3 integrated with ZSim. The results show that correcting interface-related issues is essential to achieve simulation outcomes that closely resemble actual system performance. |
| title | Different Perspectives of Memory System Simulation |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2604.16965 |