_version_ 1866917420902383616
author Xie, Yan
Mao, Changkui
Wu, Changsong
Lu, Chao
Suo, Chao
Qian, Cheng
Yang, Chun
Zhu, Danyang
Xiong, Hengchang
Lu, Hongzhan
Liu, Hongzhen
Liu, Jiafu
Chen, Jie
Dai, Jie
Tang, Junfeng
Liu, Kai
Li, Kun
Ge, Lipeng
Sun, Meng
Luo, Min
Chen, Peng
Wang, Peng
Yang, Shaodong
Tang, Shibin
Chen, Shibo
Zhang, Weikang
Ling, Xiao
Du, Xiaobo
Wu, Xin
Liu, Yang
Jiang, Yi
Jin, Yihua
Huang, Yin
Zhang, Yuli
Yuan, Zhen
Man, Zhiyuan
Yao, Zhongxiao
author_facet Xie, Yan
Mao, Changkui
Wu, Changsong
Lu, Chao
Suo, Chao
Qian, Cheng
Yang, Chun
Zhu, Danyang
Xiong, Hengchang
Lu, Hongzhan
Liu, Hongzhen
Liu, Jiafu
Chen, Jie
Dai, Jie
Tang, Junfeng
Liu, Kai
Li, Kun
Ge, Lipeng
Sun, Meng
Luo, Min
Chen, Peng
Wang, Peng
Yang, Shaodong
Tang, Shibin
Chen, Shibo
Zhang, Weikang
Ling, Xiao
Du, Xiaobo
Wu, Xin
Liu, Yang
Jiang, Yi
Jin, Yihua
Huang, Yin
Zhang, Yuli
Yuan, Zhen
Man, Zhiyuan
Yao, Zhongxiao
contents As deep learning-based AI technologies gain momentum, the demand for general-purpose AI computing architectures continues to grow. While GPGPU-based architectures offer versatility for diverse AI workloads, they often fall short in efficiency and cost-effectiveness. Various Domain-Specific Architectures (DSAs) excel at particular AI tasks but struggle to extend across broader applications or adapt to the rapidly evolving AI landscape. M100 is Li Auto's response: a performant, cost-effective architecture for AI inference in Autonomous Driving (AD), Large Language Models (LLMs), and intelligent human interactions, domains crucial to today's most competitive automobile platforms. M100 employs a dataflow parallel architecture, where compiler-architecture co-design orchestrates not only computation but, more critically, data movement across time and space. Leveraging dataflow computing efficiency, our hardware-software co-design improves system performance while reducing hardware complexity and cost. M100 largely eliminates caching: tensor computations are driven by compiler- and runtime-managed data streams flowing between computing elements and on/off-chip memories, yielding greater efficiency and scalability than cache-based systems. Another key principle was selecting the right operational granularity for scheduling, issuing, and execution across compiler, firmware, and hardware. Recognizing commonalities in AI workloads, we chose the tensor as the fundamental data element. M100 demonstrates general AI computing capability across diverse inference applications, including UniAD (for AD) and LLaMA (for LLMs). Benchmarks show M100 outperforms GPGPU architectures in AD applications with higher utilization, representing a promising direction for future general AI computing.
format Preprint
id arxiv_https___arxiv_org_abs_2604_17862
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle M100: An Orchestrated Dataflow Architecture Powering General AI Computing
Xie, Yan
Mao, Changkui
Wu, Changsong
Lu, Chao
Suo, Chao
Qian, Cheng
Yang, Chun
Zhu, Danyang
Xiong, Hengchang
Lu, Hongzhan
Liu, Hongzhen
Liu, Jiafu
Chen, Jie
Dai, Jie
Tang, Junfeng
Liu, Kai
Li, Kun
Ge, Lipeng
Sun, Meng
Luo, Min
Chen, Peng
Wang, Peng
Yang, Shaodong
Tang, Shibin
Chen, Shibo
Zhang, Weikang
Ling, Xiao
Du, Xiaobo
Wu, Xin
Liu, Yang
Jiang, Yi
Jin, Yihua
Huang, Yin
Zhang, Yuli
Yuan, Zhen
Man, Zhiyuan
Yao, Zhongxiao
Machine Learning
Hardware Architecture
As deep learning-based AI technologies gain momentum, the demand for general-purpose AI computing architectures continues to grow. While GPGPU-based architectures offer versatility for diverse AI workloads, they often fall short in efficiency and cost-effectiveness. Various Domain-Specific Architectures (DSAs) excel at particular AI tasks but struggle to extend across broader applications or adapt to the rapidly evolving AI landscape. M100 is Li Auto's response: a performant, cost-effective architecture for AI inference in Autonomous Driving (AD), Large Language Models (LLMs), and intelligent human interactions, domains crucial to today's most competitive automobile platforms. M100 employs a dataflow parallel architecture, where compiler-architecture co-design orchestrates not only computation but, more critically, data movement across time and space. Leveraging dataflow computing efficiency, our hardware-software co-design improves system performance while reducing hardware complexity and cost. M100 largely eliminates caching: tensor computations are driven by compiler- and runtime-managed data streams flowing between computing elements and on/off-chip memories, yielding greater efficiency and scalability than cache-based systems. Another key principle was selecting the right operational granularity for scheduling, issuing, and execution across compiler, firmware, and hardware. Recognizing commonalities in AI workloads, we chose the tensor as the fundamental data element. M100 demonstrates general AI computing capability across diverse inference applications, including UniAD (for AD) and LLaMA (for LLMs). Benchmarks show M100 outperforms GPGPU architectures in AD applications with higher utilization, representing a promising direction for future general AI computing.
title M100: An Orchestrated Dataflow Architecture Powering General AI Computing
topic Machine Learning
Hardware Architecture
url https://arxiv.org/abs/2604.17862