Assessing System Capabilities and Bottlenecks of an Early Fault-Tolerant Bicycle Architecture
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arXiv
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| Auteurs principaux: | , , , |
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| Format: | Preprint |
| Publié: |
2026
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| _version_ | 1866911613936730112 |
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| author | Liu, Kun Foxman, Ben Anselmetti, Gian-Luca R. Ding, Yongshan |
| author_facet | Liu, Kun Foxman, Ben Anselmetti, Gian-Luca R. Ding, Yongshan |
| contents | Early modular fault tolerant quantum computers remain constrained by costly inter-module communication and limited magic state factory service. Understanding such bottlenecks and investigating compiler optimizations most close the gap between algorithm requirements and hardware capabilities is a concrete and practically urgent systems problem. We study the modular architectures based on Bivariate Bicycle codes and identify the dominant bottleneck: inter-module communication induced by non-Clifford operations. We build a compilation pipeline to fill the missing parts of prior works and propose compiler optimizations: synthesizing arbitrary-angle rotations at the factory (syn@fac), transvection based Clifford deferral, and Clifford insertion for critical path duration reduction. We extend the evaluation scope of the prior work to 40+ benchmark categories drawn from PennyLane and MQTBench, including quantum algorithms and Hamiltonian simulations with varying sizes. Under the present instruction cost, syn@fac reduces estimated circuit failure probability by a factor of 9.0 on average across non-Clifford benchmarks. The robustness persists across sweeps of instruction cost ratios, LPU count, and factory count. Besides, transvection reduces Clifford deferral compile time by 77.04\%, while Clifford insertion reduces end-to-end circuit duration by 11.54\% on average on MQTBench, with smaller gains on Hamiltonian simulations. We hope this work inspires the studies on compiler optimizations for early modular FTQC systems. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_20013 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Assessing System Capabilities and Bottlenecks of an Early Fault-Tolerant Bicycle Architecture Liu, Kun Foxman, Ben Anselmetti, Gian-Luca R. Ding, Yongshan Quantum Physics Early modular fault tolerant quantum computers remain constrained by costly inter-module communication and limited magic state factory service. Understanding such bottlenecks and investigating compiler optimizations most close the gap between algorithm requirements and hardware capabilities is a concrete and practically urgent systems problem. We study the modular architectures based on Bivariate Bicycle codes and identify the dominant bottleneck: inter-module communication induced by non-Clifford operations. We build a compilation pipeline to fill the missing parts of prior works and propose compiler optimizations: synthesizing arbitrary-angle rotations at the factory (syn@fac), transvection based Clifford deferral, and Clifford insertion for critical path duration reduction. We extend the evaluation scope of the prior work to 40+ benchmark categories drawn from PennyLane and MQTBench, including quantum algorithms and Hamiltonian simulations with varying sizes. Under the present instruction cost, syn@fac reduces estimated circuit failure probability by a factor of 9.0 on average across non-Clifford benchmarks. The robustness persists across sweeps of instruction cost ratios, LPU count, and factory count. Besides, transvection reduces Clifford deferral compile time by 77.04\%, while Clifford insertion reduces end-to-end circuit duration by 11.54\% on average on MQTBench, with smaller gains on Hamiltonian simulations. We hope this work inspires the studies on compiler optimizations for early modular FTQC systems. |
| title | Assessing System Capabilities and Bottlenecks of an Early Fault-Tolerant Bicycle Architecture |
| topic | Quantum Physics |
| url | https://arxiv.org/abs/2604.20013 |