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Hauptverfasser: Lee, Kyungmi, Song, Zhiye, Lee, Eun Kyung, Zhang, Xin, Eilam, Tamar, Chandrakasan, Anantha P.
Format: Preprint
Veröffentlicht: 2026
Schlagworte:
Online-Zugang:https://arxiv.org/abs/2604.20105
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author Lee, Kyungmi
Song, Zhiye
Lee, Eun Kyung
Zhang, Xin
Eilam, Tamar
Chandrakasan, Anantha P.
author_facet Lee, Kyungmi
Song, Zhiye
Lee, Eun Kyung
Zhang, Xin
Eilam, Tamar
Chandrakasan, Anantha P.
contents As AI workloads drive increases in datacenter power consumption, accurate GPU power estimation is critical for proactive power management. However, existing power models face a scalability bottleneck not in the modeling techniques themselves, but in obtaining the hardware utilization inputs they require. Conventional approaches rely on either costly simulation or hardware profiling, which makes them impractical when rapid predictions are required. This work presents EnergAIzer, which addresses this scalability bottleneck by developing a lightweight solution to predict utilization inputs, reducing the estimation walltime from hours to seconds. Our key insight is that kernels in AI workloads commonly employ optimizations that create structured patterns, which analytically determine memory traffic and execution timeline. We construct a performance model using these patterns as an analytical scaffold for empirical data fitting, which also naturally exposes module-level utilization. This predicted utilization is then fed into our power model to estimate dynamic power consumption. EnergAIzer achieves 8% power errors on NVIDIA Ampere GPUs, competitive with traditional power models with elaborate cycle-level simulation or hardware profiling. We demonstrate EnergAIzer's exploration capabilities for frequency scaling and architectural configurations, including forecasting the power of NVIDIA H100 with just 7% error. In summary, EnergAIzer provides fast and accurate power prediction for AI workloads, paving the way for power-aware design explorations.
format Preprint
id arxiv_https___arxiv_org_abs_2604_20105
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle EnergAIzer: Fast and Accurate GPU Power Estimation Framework for AI Workloads
Lee, Kyungmi
Song, Zhiye
Lee, Eun Kyung
Zhang, Xin
Eilam, Tamar
Chandrakasan, Anantha P.
Hardware Architecture
As AI workloads drive increases in datacenter power consumption, accurate GPU power estimation is critical for proactive power management. However, existing power models face a scalability bottleneck not in the modeling techniques themselves, but in obtaining the hardware utilization inputs they require. Conventional approaches rely on either costly simulation or hardware profiling, which makes them impractical when rapid predictions are required. This work presents EnergAIzer, which addresses this scalability bottleneck by developing a lightweight solution to predict utilization inputs, reducing the estimation walltime from hours to seconds. Our key insight is that kernels in AI workloads commonly employ optimizations that create structured patterns, which analytically determine memory traffic and execution timeline. We construct a performance model using these patterns as an analytical scaffold for empirical data fitting, which also naturally exposes module-level utilization. This predicted utilization is then fed into our power model to estimate dynamic power consumption. EnergAIzer achieves 8% power errors on NVIDIA Ampere GPUs, competitive with traditional power models with elaborate cycle-level simulation or hardware profiling. We demonstrate EnergAIzer's exploration capabilities for frequency scaling and architectural configurations, including forecasting the power of NVIDIA H100 with just 7% error. In summary, EnergAIzer provides fast and accurate power prediction for AI workloads, paving the way for power-aware design explorations.
title EnergAIzer: Fast and Accurate GPU Power Estimation Framework for AI Workloads
topic Hardware Architecture
url https://arxiv.org/abs/2604.20105