A Novel Low-Power Cache Architecture Based on 6-Transistor SRAM Cells

Fuente: arXiv

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Bibliographic Details
Main Authors:	Dizabadi, Naser Khatti, Kaya, Ceyda Elcin
Format:	Preprint
Published:	2026
Subjects:	Hardware Architecture Emerging Technologies
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2604.20176