FlowPlace: Flow Matching for Chip Placement
Fuente:
arXiv
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| Autori principali: | , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| Soggetti: | |
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| _version_ | 1866917554676563968 |
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| author | Xie, Peng Xue, Ke Shi, Yunqi Chen, Ruo-Tong Gao, Chengrui Xu, Siyuan Ding, Chenjian Yuan, Mingxuan Qian, Chao |
| author_facet | Xie, Peng Xue, Ke Shi, Yunqi Chen, Ruo-Tong Gao, Chengrui Xu, Siyuan Ding, Chenjian Yuan, Mingxuan Qian, Chao |
| contents | Chip placement plays an important role in physical design. While generative models like diffusion models offer promising learning-based solutions, current methods have the following limitations: they use random synthetic data for pre-training, require long sampling times, and often result in overlaps due to their dependence on gradient-based solvers during the sampling process. To overcome these issues, we propose FlowPlace, which features mask-guided synthetic data generation, flow-based efficient training with flexible prior injection, and hard constraint sampling for overlap-free layouts. Experiments on OpenROAD and ICCAD 2015 benchmarks show FlowPlace achieves better PPA metrics, 10-50$\times$ faster sampling efficiency, and zero overlaps. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_23658 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | FlowPlace: Flow Matching for Chip Placement Xie, Peng Xue, Ke Shi, Yunqi Chen, Ruo-Tong Gao, Chengrui Xu, Siyuan Ding, Chenjian Yuan, Mingxuan Qian, Chao Hardware Architecture Artificial Intelligence Machine Learning Chip placement plays an important role in physical design. While generative models like diffusion models offer promising learning-based solutions, current methods have the following limitations: they use random synthetic data for pre-training, require long sampling times, and often result in overlaps due to their dependence on gradient-based solvers during the sampling process. To overcome these issues, we propose FlowPlace, which features mask-guided synthetic data generation, flow-based efficient training with flexible prior injection, and hard constraint sampling for overlap-free layouts. Experiments on OpenROAD and ICCAD 2015 benchmarks show FlowPlace achieves better PPA metrics, 10-50$\times$ faster sampling efficiency, and zero overlaps. |
| title | FlowPlace: Flow Matching for Chip Placement |
| topic | Hardware Architecture Artificial Intelligence Machine Learning |
| url | https://arxiv.org/abs/2604.23658 |