EMiX: Emulating Beyond Single-FPGA Limits
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arXiv
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| Main Authors: | , , |
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| Format: | Preprint |
| Published: |
2026
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| _version_ | 1866918474824024064 |
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| author | Kropotov, Alexander Moreto, Miquel Salami, Behzad |
| author_facet | Kropotov, Alexander Moreto, Miquel Salami, Behzad |
| contents | FPGA-level emulation is a key step in pre-silicon chip design validation. However, emulating large-scale multi-core systems increasingly exceed the hardware resource capacity of a single FPGA, limiting the feasibility of full-system emulation. To address this challenge, we introduce EMiX, a scalable multi-FPGA framework that enables distributed emulation of multi-core RISC-V architectures beyond single-FPGA resource limits. EMiX systematically partitions a monolithic multi-core design into multiple components and deploys them across multiple interconnected FPGAs, effectively exploiting inter-FPGA interconnects to balance scalability and performance without requiring fundamental RTL redesign. We prototype EMiX with a 64-core architecture across eight interconnected Alveo U55c FPGAs (scalable on core and FPGA counts), successfully demonstrating full-system execution including Linux boot. EMiX will be released as an open-source platform. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_27012 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | EMiX: Emulating Beyond Single-FPGA Limits Kropotov, Alexander Moreto, Miquel Salami, Behzad Hardware Architecture FPGA-level emulation is a key step in pre-silicon chip design validation. However, emulating large-scale multi-core systems increasingly exceed the hardware resource capacity of a single FPGA, limiting the feasibility of full-system emulation. To address this challenge, we introduce EMiX, a scalable multi-FPGA framework that enables distributed emulation of multi-core RISC-V architectures beyond single-FPGA resource limits. EMiX systematically partitions a monolithic multi-core design into multiple components and deploys them across multiple interconnected FPGAs, effectively exploiting inter-FPGA interconnects to balance scalability and performance without requiring fundamental RTL redesign. We prototype EMiX with a 64-core architecture across eight interconnected Alveo U55c FPGAs (scalable on core and FPGA counts), successfully demonstrating full-system execution including Linux boot. EMiX will be released as an open-source platform. |
| title | EMiX: Emulating Beyond Single-FPGA Limits |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2604.27012 |