Cerberus: Cross-Layer ECC Co-Design for Robust and Efficient Memory Protection

Fuente: arXiv
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Auteurs principaux: Kim, Junhwan, Kim, Seunghyun, Ryu, Yesin, Gorgin, Saeid, Kim, Jungrae
Format: Preprint
Publié: 2026
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author Kim, Junhwan
Kim, Seunghyun
Ryu, Yesin
Gorgin, Saeid
Kim, Jungrae
author_facet Kim, Junhwan
Kim, Seunghyun
Ryu, Yesin
Gorgin, Saeid
Kim, Jungrae
contents As DRAM scales to higher density and I/O speeds, ensuring data correctness becomes increasingly difficult. Industry has responded with a three-layer stack: on-die ECC (O-ECC), link ECC (L-ECC), and system ECC (S-ECC). However, these layers have evolved independently, often duplicating redundancy, leaving coverage gaps, and occasionally interfering. We propose Cerberus, a cross-layer ECC co-design that unifies protection across device, link, and system while preserving the native role of each layer. At its core is an Encode-Once, Decode-Many (EODM) architecture: the controller performs a single encoding whose redundancy is reused by L-ECC for immediate write-path detection and retry, by O-ECC for in-device repair on reads, and by S-ECC for strong end-to-end recovery. Cerberus jointly designs complementary parity and syndrome structures, orders decoders, and allocates the correction budget to prevent miscorrection amplification and enable selective correction under tight redundancy constraints. Our evaluations show improved resilience to clustered and peripheral faults while reducing redundant overhead, underscoring the importance of coordinated cross-layer protection for next-generation memory systems, such as custom HBMs.
format Preprint
id arxiv_https___arxiv_org_abs_2605_02220
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Cerberus: Cross-Layer ECC Co-Design for Robust and Efficient Memory Protection
Kim, Junhwan
Kim, Seunghyun
Ryu, Yesin
Gorgin, Saeid
Kim, Jungrae
Hardware Architecture
As DRAM scales to higher density and I/O speeds, ensuring data correctness becomes increasingly difficult. Industry has responded with a three-layer stack: on-die ECC (O-ECC), link ECC (L-ECC), and system ECC (S-ECC). However, these layers have evolved independently, often duplicating redundancy, leaving coverage gaps, and occasionally interfering. We propose Cerberus, a cross-layer ECC co-design that unifies protection across device, link, and system while preserving the native role of each layer. At its core is an Encode-Once, Decode-Many (EODM) architecture: the controller performs a single encoding whose redundancy is reused by L-ECC for immediate write-path detection and retry, by O-ECC for in-device repair on reads, and by S-ECC for strong end-to-end recovery. Cerberus jointly designs complementary parity and syndrome structures, orders decoders, and allocates the correction budget to prevent miscorrection amplification and enable selective correction under tight redundancy constraints. Our evaluations show improved resilience to clustered and peripheral faults while reducing redundant overhead, underscoring the importance of coordinated cross-layer protection for next-generation memory systems, such as custom HBMs.
title Cerberus: Cross-Layer ECC Co-Design for Robust and Efficient Memory Protection
topic Hardware Architecture
url https://arxiv.org/abs/2605.02220