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A Reconfigurable Multiplier Architecture for Error-Resilient Applications in RISC-V Core

Fuente: arXiv

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Bibliographic Details
Main Authors:	Jaswal, Pragun, Krishna, L. Hemanth, Srinivasu, B.
Format:	Preprint
Published:	2026
Subjects:	Hardware Architecture Artificial Intelligence
Online Access:	Acceder al recurso
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