Imagen de Portada

Hardware-Software Co-Design of Scalable, Energy-Efficient Analog Recurrent Computations

Fuente: arXiv

Guardado en:

Detalles Bibliográficos
Autores principales:	Fyon, Arthur, Brandoit, Julien, Mendolia, Loris, Ernst, Damien, Redouté, Jean-Michel, Drion, Guillaume
Formato:	Preprint
Publicado:	2026
Materias:	Hardware Architecture Machine Learning
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

Ejemplares similares

Improving the Performance and Learning Stability of Parallelizable RNNs Designed for Ultra-Low Power Applications
por: Brandoit, Julien, et al.
Publicado: (2026)

A Fully Tunable Ultra-Low Power Current-Mode Memory Cell in Standard CMOS Technology
por: Fyon, Arthur, et al.
Publicado: (2026)

Fast reconstruction of degenerate populations of conductance-based neuron models from spike times
por: Brandoit, Julien, et al.
Publicado: (2025)

Hardware-Software Co-Design for Accelerating Transformer Inference Leveraging Compute-in-Memory
por: Kim, Dong Eun, et al.
Publicado: (2025)

CogSys: Efficient and Scalable Neurosymbolic Cognition System via Algorithm-Hardware Co-Design
por: Wan, Zishen, et al.
Publicado: (2025)

GenDRAM:Hardware-Software Co-Design of General Platform in DRAM
por: Lu, Tsung-Han, et al.
Publicado: (2026)

Harmonia: Algorithm-Hardware Co-Design for Memory- and Compute-Efficient BFP-based LLM Inference
por: Wang, Xinyu, et al.
Publicado: (2026)

METRO: A Software-Hardware Co-Design of Interconnections for Spatial DNN Accelerators
por: Wang, Zhao, et al.
Publicado: (2021)

NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering
por: Zhou, Zhe, et al.
Publicado: (2024)

Finesse: An Agile Design Framework for Pairing-based Cryptography via Software/Hardware Co-Design
por: Pan, Tianwei, et al.
Publicado: (2025)

Energy Efficient Software Hardware CoDesign for Machine Learning: From TinyML to Large Language Models
por: Vahdatpour, Mohammad Saleh, et al.
Publicado: (2026)

MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors
por: You, Dean, et al.
Publicado: (2025)

PIM-FW: Hardware-Software Co-Design of All-pairs Shortest Paths in DRAM
por: Lu, Tsung-Han, et al.
Publicado: (2025)

Sparsity-Aware Hardware-Software Co-Design of Spiking Neural Networks: An Overview
por: Aliyev, Ilkin, et al.
Publicado: (2024)

Hardware-Software Co-Design for Event-Driven SNN Deployment on Low-Cost Neuromorphic FPGAs
por: Lee, Jiwoon, et al.
Publicado: (2026)

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design
por: Andrulis, Tanner, et al.
Publicado: (2024)

Fault-Free Analog Computing with Imperfect Hardware
por: Xu, Zhicheng, et al.
Publicado: (2025)

Efficient Nonlinear Function Approximation in Analog Resistive Crossbars for Recurrent Neural Networks
por: Yang, Junyi, et al.
Publicado: (2024)

ARMOR: Robust and Efficient CNN-Based SAR ATR through Model-Hardware Co-Design
por: Wickramasinghe, Sachini, et al.
Publicado: (2026)

In-Memory Computing Architecture for Efficient Hardware Security
por: Ajmi, Hala, et al.
Publicado: (2024)

Investigating Energy Bounds of Analog Compute-in-Memory with Local Normalization
por: Rojkov, Brian, et al.
Publicado: (2026)

SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy
por: Xuan, Wei, et al.
Publicado: (2025)

A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
por: Dang, Peng, et al.
Publicado: (2024)

TT-Edge: A Hardware-Software Co-Design for Energy-Efficient Tensor-Train Decomposition on Edge AI
por: Kwak, Hyunseok, et al.
Publicado: (2025)

NDFT: Accelerating Density Functional Theory Calculations via Hardware/Software Co-Design on Near-Data Computing System
por: Jiang, Qingcai, et al.
Publicado: (2025)

MCMComm: Hardware-Software Co-Optimization for End-to-End Communication in Multi-Chip-Modules
por: Raj, Ritik, et al.
Publicado: (2025)

Hardware-Software Co-design for 3D-DRAM-based LLM Serving Accelerator
por: Li, Cong, et al.
Publicado: (2026)

Inclusive-PIM: Hardware-Software Co-design for Broad Acceleration on Commercial PIM Architectures
por: Alsop, Johnathan, et al.
Publicado: (2023)

C2HLSC: Can LLMs Bridge the Software-to-Hardware Design Gap?
por: Collini, Luca, et al.
Publicado: (2024)

Xpikeformer: Hybrid Analog-Digital Hardware Acceleration for Spiking Transformers
por: Song, Zihang, et al.
Publicado: (2024)

Aquas: Enhancing Domain Specialization through Holistic Hardware-Software Co-Optimization based on MLIR
por: Zou, Yuyang, et al.
Publicado: (2025)

Accelerating Post-Quantum Cryptography via LLM-Driven Hardware-Software Co-Design
por: Liao, Yuchao, et al.
Publicado: (2026)

LIMCA: LLM for Automating Analog In-Memory Computing Architecture Design Exploration
por: Vungarala, Deepak, et al.
Publicado: (2025)

Energy-Efficient Hardware Acceleration of Whisper ASR on a CGLA
por: Ando, Takuto, et al.
Publicado: (2025)

SOLE: Hardware-Software Co-design of Softmax and LayerNorm for Efficient Transformer Inference
por: Wang, Wenxun, et al.
Publicado: (2025)

HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip
por: Tsai, Pei-Huan, et al.
Publicado: (2026)

Beyond Moore's Law: Harnessing the Redshift of Generative AI with Effective Hardware-Software Co-Design
por: Yazdanbakhsh, Amir
Publicado: (2025)

QED: Scalable Verification of Hardware Memory Consistency
por: Ravi, Gokulan, et al.
Publicado: (2024)

Algorithm and Hardware Co-Design for Efficient Complex-Valued Uncertainty Estimation
por: Zhang, Zehuan, et al.
Publicado: (2026)

TTP: A Hardware-Efficient Design for Precise Prefetching in Ray Tracing
por: Tozlu, Yavuz Selim, et al.
Publicado: (2026)