Scalable neuromorphic computing from autonomous spiking dynamics in a clockless reconfigurable chip

Fuente: arXiv
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Autores principales: Gomes, Eric Oliveira, Rontani, Damien
Formato: Preprint
Publicado: 2026
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_version_ 1866911688618409984
author Gomes, Eric Oliveira
Rontani, Damien
author_facet Gomes, Eric Oliveira
Rontani, Damien
contents We propose a scalable neuromorphic architecture based on spiking dynamics emerging from the autonomous time-continuous evolution of clockless (asynchronous) digital circuits. Implemented on commercially available field-programmable gate arrays (FPGAs), our system implements networks of interacting Boolean spiking neurons with configurable excitatory and inhibitory synaptic weights. A complete processing pipeline enables efficient handling of spike-encoded data for solving machine-learning tasks. We demonstrate competitive performance for an audio classification task with spike-based encoding and high-speed processing. Power consumption is significantly lower than traditional digital implementations; this makes our approach an efficient alternative that bridges the gap to dedicated analog neuromorphic systems without the need for specialized hardware design. More generally, our approach establishes clockless digital hardware as a viable platform for neuromorphic computing. It paves the way for reconfigurable chips to be turned into energy-efficient quasi-analog neuromorphic processors.
format Preprint
id arxiv_https___arxiv_org_abs_2605_16114
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Scalable neuromorphic computing from autonomous spiking dynamics in a clockless reconfigurable chip
Gomes, Eric Oliveira
Rontani, Damien
Neural and Evolutionary Computing
Machine Learning
We propose a scalable neuromorphic architecture based on spiking dynamics emerging from the autonomous time-continuous evolution of clockless (asynchronous) digital circuits. Implemented on commercially available field-programmable gate arrays (FPGAs), our system implements networks of interacting Boolean spiking neurons with configurable excitatory and inhibitory synaptic weights. A complete processing pipeline enables efficient handling of spike-encoded data for solving machine-learning tasks. We demonstrate competitive performance for an audio classification task with spike-based encoding and high-speed processing. Power consumption is significantly lower than traditional digital implementations; this makes our approach an efficient alternative that bridges the gap to dedicated analog neuromorphic systems without the need for specialized hardware design. More generally, our approach establishes clockless digital hardware as a viable platform for neuromorphic computing. It paves the way for reconfigurable chips to be turned into energy-efficient quasi-analog neuromorphic processors.
title Scalable neuromorphic computing from autonomous spiking dynamics in a clockless reconfigurable chip
topic Neural and Evolutionary Computing
Machine Learning
url https://arxiv.org/abs/2605.16114