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Disturbance Rejection Control under Nested Signal Temporal Logic Specifications: A Recursive Design Approach

Fuente: arXiv

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Detalles Bibliográficos
Autores principales:	Peng, Yuzhang, Yan, Jiaqi, Wang, Wei
Formato:	Preprint
Publicado:	2026
Materias:	Systems and Control
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

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