A Constant-Time Implementation Methodology for Activation Functions on Microcontrollers
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arXiv
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| Autores principales: | , , , , , , |
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| Formato: | Preprint |
| Publicado: |
2026
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| _version_ | 1866913152709427200 |
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| author | Tyvodar, Andrii Rechberger, Andreas Jap, Dirmanto Bhasin, Shivam Jungk, Bernhard Breier, Jakub Hou, Xiaolu |
| author_facet | Tyvodar, Andrii Rechberger, Andreas Jap, Dirmanto Bhasin, Shivam Jungk, Bernhard Breier, Jakub Hou, Xiaolu |
| contents | Embedded neural-network inference can leak information through timing side channels, including leakage caused by the evaluation of activation functions. This work proposes a constant-time implementation methodology for activation functions on embedded microcontrollers and validates it on ReLU, sigmoid, tanh, GELU, and Swish on an ARM Cortex-M4 platform. The proposed methodology combines branchless selection, fixed-cost Padé-based approximation, dummy arithmetic where needed, and cycle alignment to obtain timing-regular activation-function implementations. As motivation, we also evaluate a desynchronization-based countermeasure and show that it remains vulnerable to a template-based timing attack. Experimental results show that the resulting protected implementations achieve identical cycle counts for all tested inputs, including (88) cycles in the three-function setting and (108) cycles in the five-function setting. At the same time, the numerical-error analysis indicates that the approximated nonlinear functions retain high accuracy. These results suggest that the proposed methodology provides a practical basis for constructing side-channel-resistant activation functions in embedded inference. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2605_22441 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | A Constant-Time Implementation Methodology for Activation Functions on Microcontrollers Tyvodar, Andrii Rechberger, Andreas Jap, Dirmanto Bhasin, Shivam Jungk, Bernhard Breier, Jakub Hou, Xiaolu Cryptography and Security Artificial Intelligence Embedded neural-network inference can leak information through timing side channels, including leakage caused by the evaluation of activation functions. This work proposes a constant-time implementation methodology for activation functions on embedded microcontrollers and validates it on ReLU, sigmoid, tanh, GELU, and Swish on an ARM Cortex-M4 platform. The proposed methodology combines branchless selection, fixed-cost Padé-based approximation, dummy arithmetic where needed, and cycle alignment to obtain timing-regular activation-function implementations. As motivation, we also evaluate a desynchronization-based countermeasure and show that it remains vulnerable to a template-based timing attack. Experimental results show that the resulting protected implementations achieve identical cycle counts for all tested inputs, including (88) cycles in the three-function setting and (108) cycles in the five-function setting. At the same time, the numerical-error analysis indicates that the approximated nonlinear functions retain high accuracy. These results suggest that the proposed methodology provides a practical basis for constructing side-channel-resistant activation functions in embedded inference. |
| title | A Constant-Time Implementation Methodology for Activation Functions on Microcontrollers |
| topic | Cryptography and Security Artificial Intelligence |
| url | https://arxiv.org/abs/2605.22441 |