Unified Flux Control Architecture for Fluxonium Qubits
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arXiv
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| Auteurs principaux: | , , , , , , , , , , , , , , , , |
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| Format: | Preprint |
| Publié: |
2026
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| _version_ | 1866914615352360960 |
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| author | Pan, Xianchuang Wang, Jiahui Zhou, Tao Guo, Yanbo Wang, Fei Zhan, Ze Xiang, Liang Li, Zishuo Ma, Lu Ma, Xizheng Zhan, Huijuan Zhang, Tao Lu, Kannan Zhu, Xing Gong, Guicheng Deng, Chunqing Wang, Tenghui |
| author_facet | Pan, Xianchuang Wang, Jiahui Zhou, Tao Guo, Yanbo Wang, Fei Zhan, Ze Xiang, Liang Li, Zishuo Ma, Lu Ma, Xizheng Zhan, Huijuan Zhang, Tao Lu, Kannan Zhu, Xing Gong, Guicheng Deng, Chunqing Wang, Tenghui |
| contents | Control architectures that reduce hardware overhead while maintaining high-fidelity operations are essential for the continued scaling of superconducting quantum processors. Here we experimentally realize a unified control architecture for fluxonium qubits, in which both transverse ($XY$) and longitudinal ($Z$) operations are implemented through a single flux-control channel driven by a single arbitrary waveform generator channel. This architecture imposes competing requirements on the shared control channel, which must simultaneously support low-frequency flux transmission for reset operations while strongly attenuating broadband noise near the qubit transition frequency. We address this challenge through frequency-selective cryogenic filtering together with compensated waveform synthesis that corrects the pulse distortion introduced by the filtered control line. Experimentally, this approach preserves coherence times above 100 $μ$s while enabling active reset with approximately 98% fidelity and 20-ns single-qubit gates with fidelities exceeding 99.99%. We further demonstrate FPGA-native instruction-level waveform synthesis based on reusable pulse primitives for unified flux control. These results establish unified flux control as a scalable architecture for fluxonium qubits that reduces control hardware overhead while preserving high-fidelity operation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2605_25948 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Unified Flux Control Architecture for Fluxonium Qubits Pan, Xianchuang Wang, Jiahui Zhou, Tao Guo, Yanbo Wang, Fei Zhan, Ze Xiang, Liang Li, Zishuo Ma, Lu Ma, Xizheng Zhan, Huijuan Zhang, Tao Lu, Kannan Zhu, Xing Gong, Guicheng Deng, Chunqing Wang, Tenghui Quantum Physics Control architectures that reduce hardware overhead while maintaining high-fidelity operations are essential for the continued scaling of superconducting quantum processors. Here we experimentally realize a unified control architecture for fluxonium qubits, in which both transverse ($XY$) and longitudinal ($Z$) operations are implemented through a single flux-control channel driven by a single arbitrary waveform generator channel. This architecture imposes competing requirements on the shared control channel, which must simultaneously support low-frequency flux transmission for reset operations while strongly attenuating broadband noise near the qubit transition frequency. We address this challenge through frequency-selective cryogenic filtering together with compensated waveform synthesis that corrects the pulse distortion introduced by the filtered control line. Experimentally, this approach preserves coherence times above 100 $μ$s while enabling active reset with approximately 98% fidelity and 20-ns single-qubit gates with fidelities exceeding 99.99%. We further demonstrate FPGA-native instruction-level waveform synthesis based on reusable pulse primitives for unified flux control. These results establish unified flux control as a scalable architecture for fluxonium qubits that reduces control hardware overhead while preserving high-fidelity operation. |
| title | Unified Flux Control Architecture for Fluxonium Qubits |
| topic | Quantum Physics |
| url | https://arxiv.org/abs/2605.25948 |