HammerSim: A System-Level Tool to Model RowHammer
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arXiv
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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2026
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| _version_ | 1866917538179317760 |
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| author | Goswami, Kaustav Akram, Ayaz Venugopalan, Hari Lowe-Power, Jason |
| author_facet | Goswami, Kaustav Akram, Ayaz Venugopalan, Hari Lowe-Power, Jason |
| contents | Modern architecture research relies on simulators to evaluate system security, yet analyzing emerging hardware vulnerabilities like RowHammer requires full-system visibility. As RowHammer vulnerabilities worsen with continuous technology scaling, existing simulators lack the system-level models needed to study complex OS effects and cross-layer mitigations. This tool deficiency leaves modern computing platforms exposed to severe reliability and security risks. In this work, we present HammerSim, a gem5-based framework for modeling RowHammer at the full-system level. HammerSim integrates probability-driven bitflip modeling to realistically capture the behavior of RowHammer. It further enables evaluation of hardware and software mitigations such as TRR and selective ECC. We validate HammerSim's bitflip modeling against real DDR4 DIMMs using JS divergence, demonstrating its utility in studying attacks, defenses, and benign workload susceptibility. Our framework provides an extensible platform to bridge the gap between hardware experiments and architectural simulation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2605_27803 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | HammerSim: A System-Level Tool to Model RowHammer Goswami, Kaustav Akram, Ayaz Venugopalan, Hari Lowe-Power, Jason Cryptography and Security Hardware Architecture Modern architecture research relies on simulators to evaluate system security, yet analyzing emerging hardware vulnerabilities like RowHammer requires full-system visibility. As RowHammer vulnerabilities worsen with continuous technology scaling, existing simulators lack the system-level models needed to study complex OS effects and cross-layer mitigations. This tool deficiency leaves modern computing platforms exposed to severe reliability and security risks. In this work, we present HammerSim, a gem5-based framework for modeling RowHammer at the full-system level. HammerSim integrates probability-driven bitflip modeling to realistically capture the behavior of RowHammer. It further enables evaluation of hardware and software mitigations such as TRR and selective ECC. We validate HammerSim's bitflip modeling against real DDR4 DIMMs using JS divergence, demonstrating its utility in studying attacks, defenses, and benign workload susceptibility. Our framework provides an extensible platform to bridge the gap between hardware experiments and architectural simulation. |
| title | HammerSim: A System-Level Tool to Model RowHammer |
| topic | Cryptography and Security Hardware Architecture |
| url | https://arxiv.org/abs/2605.27803 |