Uncertainty-triggered wake-up enables energy-efficient, error-resilient edge AI with memristor front ends
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| Format: | Preprint |
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2026
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| author | Ballet, Théo Romdhane, Aymen Lovison-Franco, Bruno Dupuis, Théo Renaudineau, Adrien Alencar, Felipe Paiva Iftakher, Mohammed Akib Turck, Clément Harabi, Kamel-Eddine Vianello, Elisa Portal, Jean-Michel Benoit, Pascal Novo, David Querlioz, Damien |
| author_facet | Ballet, Théo Romdhane, Aymen Lovison-Franco, Bruno Dupuis, Théo Renaudineau, Adrien Alencar, Felipe Paiva Iftakher, Mohammed Akib Turck, Clément Harabi, Kamel-Eddine Vianello, Elisa Portal, Jean-Michel Benoit, Pascal Novo, David Querlioz, Damien |
| contents | Memristor computing offers a route to low-energy edge AI, but device variability, sensitivity to operating conditions, and system-integration challenges can hinder deployment. Here we show that these limitations can be mitigated by using memristor AI not as the final decision maker but as the ultra-low-power, always-on front end of a heterogeneous inference system. We implement this architecture by coupling a fabricated memristor Bayesian machine to a programmable CPU running a higher-power, higher-accuracy software neural network. The memristor front end acts as a probabilistic screener. When it predicts an abnormal event or produces an ambiguous or invalid output, a dedicated hardware wake-up path activates the CPU, which produces the final decision. We validate this architecture on a heartbeat-classification benchmark by interfacing the fabricated Bayesian machine with an FPGA-based wake-up platform and CPU back end. The resulting uncertainty-triggered wake-up system achieves high final classification accuracy under nominal operation and maintains this accuracy even when the memristor front end is degraded by voltage scaling or reduced programming margins, because unreliable outputs are converted into recoverable wake-up events instead of becoming silent errors. Post-layout analysis of an ASIC implementation shows that average energy is governed primarily by wake-up frequency, providing practical design rules for choosing front-end operating points. These results establish uncertainty-triggered wake-up as a strategy for energy-efficient, error-resilient edge AI. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2605_29533 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Uncertainty-triggered wake-up enables energy-efficient, error-resilient edge AI with memristor front ends Ballet, Théo Romdhane, Aymen Lovison-Franco, Bruno Dupuis, Théo Renaudineau, Adrien Alencar, Felipe Paiva Iftakher, Mohammed Akib Turck, Clément Harabi, Kamel-Eddine Vianello, Elisa Portal, Jean-Michel Benoit, Pascal Novo, David Querlioz, Damien Emerging Technologies Memristor computing offers a route to low-energy edge AI, but device variability, sensitivity to operating conditions, and system-integration challenges can hinder deployment. Here we show that these limitations can be mitigated by using memristor AI not as the final decision maker but as the ultra-low-power, always-on front end of a heterogeneous inference system. We implement this architecture by coupling a fabricated memristor Bayesian machine to a programmable CPU running a higher-power, higher-accuracy software neural network. The memristor front end acts as a probabilistic screener. When it predicts an abnormal event or produces an ambiguous or invalid output, a dedicated hardware wake-up path activates the CPU, which produces the final decision. We validate this architecture on a heartbeat-classification benchmark by interfacing the fabricated Bayesian machine with an FPGA-based wake-up platform and CPU back end. The resulting uncertainty-triggered wake-up system achieves high final classification accuracy under nominal operation and maintains this accuracy even when the memristor front end is degraded by voltage scaling or reduced programming margins, because unreliable outputs are converted into recoverable wake-up events instead of becoming silent errors. Post-layout analysis of an ASIC implementation shows that average energy is governed primarily by wake-up frequency, providing practical design rules for choosing front-end operating points. These results establish uncertainty-triggered wake-up as a strategy for energy-efficient, error-resilient edge AI. |
| title | Uncertainty-triggered wake-up enables energy-efficient, error-resilient edge AI with memristor front ends |
| topic | Emerging Technologies |
| url | https://arxiv.org/abs/2605.29533 |