A 32-Channel 3.53-μW Per Channel Brain-Machine Interface SoC Featuring Dual-Threshold Delta-modulation, In-Memory Spike Detection and Bi-SNN Based Motor Decoding

Fuente: arXiv
Saved in:
Bibliographic Details
Main Authors: Ke, Ye, Fu, Zhengnan, Sun, Pao-Sheng Vincent, Guo, An, Dong, Shuai, Yang, Junyi, Yang, Yahan, Eldaly, Abdelrahman B. M., Si, Xin, Chan, Leanne, Basu, Arindam
Format: Preprint
Published: 2026
Subjects:
Online Access:
Tags: Add Tag
No Tags, Be the first to tag this record!