A 32-Channel 3.53-μW Per Channel Brain-Machine Interface SoC Featuring Dual-Threshold Delta-modulation, In-Memory Spike Detection and Bi-SNN Based Motor Decoding

Fuente: arXiv

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Bibliographic Details
Main Authors:	Ke, Ye, Fu, Zhengnan, Sun, Pao-Sheng Vincent, Guo, An, Dong, Shuai, Yang, Junyi, Yang, Yahan, Eldaly, Abdelrahman B. M., Si, Xin, Chan, Leanne, Basu, Arindam
Format:	Preprint
Published:	2026
Subjects:	Signal Processing
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2606.01776