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| Autore principale: | |
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| Natura: | Artículo científico |
| Lingua: | en |
| Pubblicazione: |
Universidad Nacional Autónoma de México
2008
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| Accesso online: | https://www.redalyc.org/articulo.oa?id=40490306 |
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Sommario:
- Frame, bit and chip error rate evaluation for a DSSS communication system F.R. Castillo Soria D. Pacheco Bautista M. Sánchez Meraz Ingeniería Simulation spread spectrum multiple access frame error rate The relation between chips, bits and frames error rates in the Additive White Gaussian Noise (AWGN) channel for a Direct Sequence Spread Spectrum (DSSS) system, in Multiple Access Interference (MAI) conditions is evaluated. A simple error-correction code (ECC) for the Frame Error Rate (FER) evaluation is used. 64 bits (chips) Pseudo Noise (PN) sequences are employed for the spread spectrum transmission.An iterative Montecarlo (stochastic) simulation is used to evaluate how many errors on chips are introduced for channel effects and how they are related to the bit errors. It canbe observed how the bit errors may eventually cause a frame error, i. e. CODEC or com munication error. These results are useful for academics, engineers, or professionals alike. 2008 artículo científico 1405-7743 https://www.redalyc.org/articulo.oa?id=40490306 en http://www.redalyc.org/revista.oa?id=404 Ingeniería. Investigación y Tecnología application/pdf Universidad Nacional Autónoma de México Ingeniería. Investigación y Tecnología (México) Num.3 Vol.IX