Implementation of a neuron model using FPGAs
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| Format: | Artículo científico |
| Sprache: | en |
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Universidad Nacional Autónoma de México
2003
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| _version_ | 1876465289838723072 |
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| author | M. A. Bañuelos Saucedo |
| author_facet | M. A. Bañuelos Saucedo |
| contents | Implementation of a neuron model using FPGAs M. A. Bañuelos Saucedo R. Damián Zamacona J. Valeriano Assem R. E. Cervantes R. Fuentes González G. Calva Olmos J. L. Pérez Silva S. Quintana Thierry J. Castillo Hernández Ingeniería McCullogh Pitts neuron Digital artificial neuron field programmable gate array Artificial neural networks base their processing capabilities in a parallel architecture, and this makes them useful to solve pattern recognition, system identification, and control problems. In this paper, we present a FPGA (Field Programmable Gate Array) based digital implementation of a McCulloch-Pitts type of neuron model with three types of non-linear activation function: step, ramp-saturation, and sigmoid. We present the VHDL language code used to implement the neurons as well as to present simulation results obtained with Xilinx Foundation 3.0 software. The results are analyzed in terms of speed and percentage of chip usage. 2003 artículo científico 1665-6423 https://www.redalyc.org/articulo.oa?id=47410306 en http://www.redalyc.org/revista.oa?id=474 Journal of Applied Research and Technology application/pdf Universidad Nacional Autónoma de México Journal of Applied Research and Technology (México) Num.3 Vol.1 |
| format | Artículo científico |
| id | redalyc_47410306 |
| institution | Redalyc |
| language | en |
| publishDate | 2003 |
| publisher | Universidad Nacional Autónoma de México |
| spellingShingle | Implementation of a neuron model using FPGAs M. A. Bañuelos Saucedo Ingeniería McCullogh Pitts neuron Digital artificial neuron field programmable gate array Implementation of a neuron model using FPGAs M. A. Bañuelos Saucedo R. Damián Zamacona J. Valeriano Assem R. E. Cervantes R. Fuentes González G. Calva Olmos J. L. Pérez Silva S. Quintana Thierry J. Castillo Hernández Ingeniería McCullogh Pitts neuron Digital artificial neuron field programmable gate array Artificial neural networks base their processing capabilities in a parallel architecture, and this makes them useful to solve pattern recognition, system identification, and control problems. In this paper, we present a FPGA (Field Programmable Gate Array) based digital implementation of a McCulloch-Pitts type of neuron model with three types of non-linear activation function: step, ramp-saturation, and sigmoid. We present the VHDL language code used to implement the neurons as well as to present simulation results obtained with Xilinx Foundation 3.0 software. The results are analyzed in terms of speed and percentage of chip usage. 2003 artículo científico 1665-6423 https://www.redalyc.org/articulo.oa?id=47410306 en http://www.redalyc.org/revista.oa?id=474 Journal of Applied Research and Technology application/pdf Universidad Nacional Autónoma de México Journal of Applied Research and Technology (México) Num.3 Vol.1 |
| title | Implementation of a neuron model using FPGAs |
| topic | Ingeniería McCullogh Pitts neuron Digital artificial neuron field programmable gate array |
| url | https://www.redalyc.org/articulo.oa?id=47410306 |