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  • Performance evaluation of M-ary algorithm using reprogrammable hardware
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Performance evaluation of M-ary algorithm using reprogrammable hardware

Fuente: Redalyc
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Bibliographic Details
Main Author: Sergio Andrés Arenas-Hoyos
Format: Artículo científico
Language:en
Published: Universidad Nacional de Colombia 2017
Subjects:
Ingeniería
FPGA
cryptosystems
RSA algorithm
ary algorithm
modular arithmetic
Online Access:
Acceder al recurso 1 Acceder al recurso 2 Acceder al recurso 3 Acceder al recurso 4 Acceder al recurso 5
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Internet

https://www.redalyc.org/articulo.oa?id=49655603009
https://www.redalyc.org/journal/496/49655603009/
https://www.redalyc.org/journal/496/49655603009/html/
https://www.redalyc.org/journal/496/49655603009/49655603009.epub
https://www.redalyc.org/journal/496/49655603009/movil

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