A Fault Diagnosis Scheme and Its Quality Issue in Reconfigurable Array Architecture
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| Format: | Artículo científico |
| Langue: | en |
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Universidad Nacional de La Plata
2006
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| _version_ | 1876479342031142912 |
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| author | Yung-Yuan Chen |
| author_facet | Yung-Yuan Chen |
| contents | A Fault Diagnosis Scheme and Its Quality Issue in Reconfigurable Array Architecture Yung-Yuan Chen Computación test quality Fault diagnosis errors in testing switching network reconfigurable arrays In this paper, we propose an efficient diagnosis scheme to detect and locate the switching network defects/faults in reconfigurable array architecture. This diagnosis scheme performs the test of switching network based on the scan path and fault intersection test methodology to locate the faults occurring in the switching network. After the diagnosis of switching network, the processing element (PE) test can then be initiated through the good switches and links. Errors in testing that cause a good switch, link or PE to be considered as a bad one is called “killing error”. The issue of killing error in testing is addressed and the probability of killing error for our diagnosis technique is analyzed and shown to be extremely low. The significance of this approach is the ability to detect and locate the multiple faults in switches, links, and PEs with low testing circuit overhead, and to offer the good test quality in linear diagnosis time. 2006 artículo científico 1666-6046 https://www.redalyc.org/articulo.oa?id=638067342007 en http://www.redalyc.org/revista.oa?id=6380 Journal of Computer Science and Technology application/pdf Universidad Nacional de La Plata Journal of Computer Science and Technology (Argentina) Num.01 Vol.6 |
| format | Artículo científico |
| id | redalyc_638067342007 |
| institution | Redalyc |
| language | en |
| publishDate | 2006 |
| publisher | Universidad Nacional de La Plata |
| spellingShingle | A Fault Diagnosis Scheme and Its Quality Issue in Reconfigurable Array Architecture Yung-Yuan Chen Computación test quality Fault diagnosis errors in testing switching network reconfigurable arrays A Fault Diagnosis Scheme and Its Quality Issue in Reconfigurable Array Architecture Yung-Yuan Chen Computación test quality Fault diagnosis errors in testing switching network reconfigurable arrays In this paper, we propose an efficient diagnosis scheme to detect and locate the switching network defects/faults in reconfigurable array architecture. This diagnosis scheme performs the test of switching network based on the scan path and fault intersection test methodology to locate the faults occurring in the switching network. After the diagnosis of switching network, the processing element (PE) test can then be initiated through the good switches and links. Errors in testing that cause a good switch, link or PE to be considered as a bad one is called “killing error”. The issue of killing error in testing is addressed and the probability of killing error for our diagnosis technique is analyzed and shown to be extremely low. The significance of this approach is the ability to detect and locate the multiple faults in switches, links, and PEs with low testing circuit overhead, and to offer the good test quality in linear diagnosis time. 2006 artículo científico 1666-6046 https://www.redalyc.org/articulo.oa?id=638067342007 en http://www.redalyc.org/revista.oa?id=6380 Journal of Computer Science and Technology application/pdf Universidad Nacional de La Plata Journal of Computer Science and Technology (Argentina) Num.01 Vol.6 |
| title | A Fault Diagnosis Scheme and Its Quality Issue in Reconfigurable Array Architecture |
| topic | Computación test quality Fault diagnosis errors in testing switching network reconfigurable arrays |
| url | https://www.redalyc.org/articulo.oa?id=638067342007 |