Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction
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| Format: | Artículo científico |
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Universidad Nacional de Colombia
2021
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| author | Vaidotas Barzdenas |
| author_facet | Vaidotas Barzdenas |
| contents | Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction Vaidotas Barzdenas Gediminas Grazulevicius John Liobe Aleksandr Vasjanov Leonid Kladovscikov Ingeniería TCAD tools learning technology laboratory learning environment Electronics engineering education This paper describes the analysis of processes used in micro- and nano-electronic device manufacturing. It also presents an exemplary and novel laboratory exercise in which an epitaxial planar n + pn bipolar transistor with junction isolation is illustrated and analyzed step-by-step. Only seven photolithography steps are used to obtain this bipolar transistor structure: for buried layer formation, for junction transistor isolation and collectors regions formation, for base region formation, for emitter and collector n+ region formation, for contact windows, for first aluminum metallization, and, finally, for passivation. Silvaco TCAD software tools are used to implement all of these manufacturing processes and to simulate the resulting I-V characteristics of all presented semiconductor structures. This type of laboratory work provides students with basic knowledge and a consistent understanding of bipolar transistor manufacturing, as well as facilitating theoretical understanding, analysis, and simulation of various semiconductor manufacturing processes without the need for costly and lengthy technological manufacturing experiments. This article also presents the conclusions and other benefits of such laboratory work, as well as possible recommendations for further improvement or expansion. 2021 artículo científico 0120-5609 https://www.redalyc.org/articulo.oa?id=64379876009 https://www.redalyc.org/journal/643/64379876009/ https://www.redalyc.org/journal/643/64379876009/html/ https://www.redalyc.org/journal/643/64379876009/64379876009.epub https://www.redalyc.org/journal/643/64379876009/movil 10.15446/ing.investig.v41n3.88685 en http://www.redalyc.org/revista.oa?id=643 Ingeniería e Investigación application/pdf Universidad Nacional de Colombia Ingeniería e Investigación (Colombia) Num.3 Vol.41 |
| format | Artículo científico |
| id | redalyc_64379876009 |
| institution | Redalyc |
| language | en |
| publishDate | 2021 |
| publisher | Universidad Nacional de Colombia |
| spellingShingle | Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction Vaidotas Barzdenas Ingeniería TCAD tools learning technology laboratory learning environment Electronics engineering education Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction Vaidotas Barzdenas Gediminas Grazulevicius John Liobe Aleksandr Vasjanov Leonid Kladovscikov Ingeniería TCAD tools learning technology laboratory learning environment Electronics engineering education This paper describes the analysis of processes used in micro- and nano-electronic device manufacturing. It also presents an exemplary and novel laboratory exercise in which an epitaxial planar n + pn bipolar transistor with junction isolation is illustrated and analyzed step-by-step. Only seven photolithography steps are used to obtain this bipolar transistor structure: for buried layer formation, for junction transistor isolation and collectors regions formation, for base region formation, for emitter and collector n+ region formation, for contact windows, for first aluminum metallization, and, finally, for passivation. Silvaco TCAD software tools are used to implement all of these manufacturing processes and to simulate the resulting I-V characteristics of all presented semiconductor structures. This type of laboratory work provides students with basic knowledge and a consistent understanding of bipolar transistor manufacturing, as well as facilitating theoretical understanding, analysis, and simulation of various semiconductor manufacturing processes without the need for costly and lengthy technological manufacturing experiments. This article also presents the conclusions and other benefits of such laboratory work, as well as possible recommendations for further improvement or expansion. 2021 artículo científico 0120-5609 https://www.redalyc.org/articulo.oa?id=64379876009 https://www.redalyc.org/journal/643/64379876009/ https://www.redalyc.org/journal/643/64379876009/html/ https://www.redalyc.org/journal/643/64379876009/64379876009.epub https://www.redalyc.org/journal/643/64379876009/movil 10.15446/ing.investig.v41n3.88685 en http://www.redalyc.org/revista.oa?id=643 Ingeniería e Investigación application/pdf Universidad Nacional de Colombia Ingeniería e Investigación (Colombia) Num.3 Vol.41 |
| title | Verification of a Fabless Device Model Using TCAD Tools: from Bipolar Transistor Formation to I-V Characteristics Extraction |
| topic | Ingeniería TCAD tools learning technology laboratory learning environment Electronics engineering education |
| url | https://www.redalyc.org/articulo.oa?id=64379876009 https://www.redalyc.org/journal/643/64379876009/ https://www.redalyc.org/journal/643/64379876009/html/ https://www.redalyc.org/journal/643/64379876009/64379876009.epub https://www.redalyc.org/journal/643/64379876009/movil |