Salvato in:
| Autore principale: | |
|---|---|
| Natura: | Artículo científico |
| Lingua: | en |
| Pubblicazione: |
Universidad de Carabobo
2007
|
| Soggetti: | |
| Accesso online: | https://www.redalyc.org/articulo.oa?id=70711528010 |
| Tags: |
Aggiungi Tag
Nessun Tag, puoi essere il primo ad aggiungerne!!
|
Sommario:
- A circuit model for the post-breakdown I-V characteristics in MOS devices on P-type substrate A. Ortiz-Conde E. Miranda F. J. García Sanchez E. Farkas S. Malobabic Ingeniería metal oxide reliability semiconductor Oxide breakdown The post-breakdown leakage current in MOS p-silicon devices cannot be modeled with a single-diode and a series resistance for the complete range because of the complex shape of its logarithmic plot. For low voltage, the current can be described by a single-diode model and a series resistance, and for high voltage a different singlediode model and a resistance can be used. These two regional single-diode models are combined in a double diode model with two resistances. 2007 artículo científico 1316-6832 https://www.redalyc.org/articulo.oa?id=70711528010 en http://www.redalyc.org/revista.oa?id=707 Revista INGENIERÍA UC application/pdf Universidad de Carabobo Revista INGENIERÍA UC (República Bolivariana de Venezuela) Num.2 Vol.14