Simulación e implementación en FPGA de un esquema de codificación del canal sujeto al estandar de Wimax
Fuente:
Redalyc
Salvato in:
| Autore principale: | |
|---|---|
| Natura: | Artículo científico |
| Lingua: | es |
| Pubblicazione: |
Universidad San Francisco de Quito
2011
|
| Soggetti: | |
| Accesso online: | |
| Tags: |
Aggiungi Tag
Nessun Tag, puoi essere il primo ad aggiungerne!!
|
| _version_ | 1876472437359509504 |
|---|---|
| author | José Andrés Marzo Icaza |
| author_facet | José Andrés Marzo Icaza |
| contents | Simulación e implementación en FPGA de un esquema de codificación del canal sujeto al estandar de Wimax José Andrés Marzo Icaza Rebeca Leonor Estrada Pico Multidisciplinaria (Ciencias Naturales y Exactas) FEC FPGA Wimax channel encoder System generator This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of sight. The paper presents the main features used in Wimax for transmitting and receiving also the operation of each of the blocks used for error correction. This project presents an implementation using FPGA-based design model, using the System Generator software with Matlab and Simulink, to obtain data that allow us to verify the operation of the proposed design according to the standard specifications and also analyze the ability for error correcting using BER vs. SNR curves and constellations to the channel output to justify the use of the system design. 2011 artículo científico 1390-5384 https://www.redalyc.org/articulo.oa?id=726180824004 es http://www.redalyc.org/revista.oa?id=7261 Avances en Ciencias e Ingenierías application/pdf Universidad San Francisco de Quito Avances en Ciencias e Ingenierías (Ecuador) Num.1 Vol.3 |
| format | Artículo científico |
| id | redalyc_726180824004 |
| institution | Redalyc |
| language | es |
| publishDate | 2011 |
| publisher | Universidad San Francisco de Quito |
| spellingShingle | Simulación e implementación en FPGA de un esquema de codificación del canal sujeto al estandar de Wimax José Andrés Marzo Icaza Multidisciplinaria (Ciencias Naturales y Exactas) FEC FPGA Wimax channel encoder System generator Simulación e implementación en FPGA de un esquema de codificación del canal sujeto al estandar de Wimax José Andrés Marzo Icaza Rebeca Leonor Estrada Pico Multidisciplinaria (Ciencias Naturales y Exactas) FEC FPGA Wimax channel encoder System generator This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of sight. The paper presents the main features used in Wimax for transmitting and receiving also the operation of each of the blocks used for error correction. This project presents an implementation using FPGA-based design model, using the System Generator software with Matlab and Simulink, to obtain data that allow us to verify the operation of the proposed design according to the standard specifications and also analyze the ability for error correcting using BER vs. SNR curves and constellations to the channel output to justify the use of the system design. 2011 artículo científico 1390-5384 https://www.redalyc.org/articulo.oa?id=726180824004 es http://www.redalyc.org/revista.oa?id=7261 Avances en Ciencias e Ingenierías application/pdf Universidad San Francisco de Quito Avances en Ciencias e Ingenierías (Ecuador) Num.1 Vol.3 |
| title | Simulación e implementación en FPGA de un esquema de codificación del canal sujeto al estandar de Wimax |
| topic | Multidisciplinaria (Ciencias Naturales y Exactas) FEC FPGA Wimax channel encoder System generator |
| url | https://www.redalyc.org/articulo.oa?id=726180824004 |