Caracterización eléctrica de nano-MOSFETs en tecnología SOI
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| Format: | Artículo científico |
| Langue: | es |
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Universidad San Francisco de Quito
2012
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| _version_ | 1876482229032452096 |
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| author | John P. Artieda |
| author_facet | John P. Artieda |
| contents | Caracterización eléctrica de nano-MOSFETs en tecnología SOI John P. Artieda Lionel Trojman Felice Crup Lars-Ake Ragnarson Multidisciplinaria (Ciencias Naturales y Exactas) EOT nMOS high MOSFET SOI technology This paper reports about the extensive electrical characterization, with low distortion and greater reliability, of MOSFET devices at nanometric scales with ultra thin Fully Depleted (FD) type architecture on Silicon-On-Insulator (SOI) technology to reduce the short channel effects. The parameters of nMOS type devices of 10x1 µm 2 gate dimensions with conventional dielectric (SiON) and alternative high-k dielectric (HfO2) are compared. The extracted parameters are: equivalent oxide thickness (EOT), threshold voltage (VT ) as a function of the SOI body voltage (VB), transconductance (gm), maximum transconductance (gm,max) and its corresponding relation with mobility. The objective is to find if the classic electrical characterization methodology can be applied to the new ultra thin devices overcoming the challenges and physical difficulties imposed by the SOI technology and to demonstrate if the ultra thin devices behavior is similar to conventional MOSFETs. The semiconductor devices analyzed were provided by the IMEC consortium in Belgium and have been characterized in the new nanoelectronics laboratory at Universidad San Francisco de Quito (USFQ) in Ecuador. 2012 artículo científico 1390-5384 https://www.redalyc.org/articulo.oa?id=726180833013 es http://www.redalyc.org/revista.oa?id=7261 Avances en Ciencias e Ingenierías application/pdf Universidad San Francisco de Quito Avances en Ciencias e Ingenierías (Ecuador) Num.2 Vol.4 |
| format | Artículo científico |
| id | redalyc_726180833013 |
| institution | Redalyc |
| language | es |
| publishDate | 2012 |
| publisher | Universidad San Francisco de Quito |
| spellingShingle | Caracterización eléctrica de nano-MOSFETs en tecnología SOI John P. Artieda Multidisciplinaria (Ciencias Naturales y Exactas) EOT nMOS high MOSFET SOI technology Caracterización eléctrica de nano-MOSFETs en tecnología SOI John P. Artieda Lionel Trojman Felice Crup Lars-Ake Ragnarson Multidisciplinaria (Ciencias Naturales y Exactas) EOT nMOS high MOSFET SOI technology This paper reports about the extensive electrical characterization, with low distortion and greater reliability, of MOSFET devices at nanometric scales with ultra thin Fully Depleted (FD) type architecture on Silicon-On-Insulator (SOI) technology to reduce the short channel effects. The parameters of nMOS type devices of 10x1 µm 2 gate dimensions with conventional dielectric (SiON) and alternative high-k dielectric (HfO2) are compared. The extracted parameters are: equivalent oxide thickness (EOT), threshold voltage (VT ) as a function of the SOI body voltage (VB), transconductance (gm), maximum transconductance (gm,max) and its corresponding relation with mobility. The objective is to find if the classic electrical characterization methodology can be applied to the new ultra thin devices overcoming the challenges and physical difficulties imposed by the SOI technology and to demonstrate if the ultra thin devices behavior is similar to conventional MOSFETs. The semiconductor devices analyzed were provided by the IMEC consortium in Belgium and have been characterized in the new nanoelectronics laboratory at Universidad San Francisco de Quito (USFQ) in Ecuador. 2012 artículo científico 1390-5384 https://www.redalyc.org/articulo.oa?id=726180833013 es http://www.redalyc.org/revista.oa?id=7261 Avances en Ciencias e Ingenierías application/pdf Universidad San Francisco de Quito Avances en Ciencias e Ingenierías (Ecuador) Num.2 Vol.4 |
| title | Caracterización eléctrica de nano-MOSFETs en tecnología SOI |
| topic | Multidisciplinaria (Ciencias Naturales y Exactas) EOT nMOS high MOSFET SOI technology |
| url | https://www.redalyc.org/articulo.oa?id=726180833013 |