A low‐latency memory‐cube network with dual diagonal mesh topology and bypassed pipelines

Fuente: Wiley Open Access

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Bibliographic Details
Main Authors:	Masashi Oda, Kai Keida, Ryota Yasudo
Format:	Artículo Open Access
Published:	Wiley 2024
Subjects:	Concurrency and Computation: Practice and Experience
Online Access:	Acceder al recurso
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Description
DOI:	10.1002/cpe.8290

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