Low power and noise‐immune 9 T compute SRAM cell design based on differential power generator and Schmitt‐trigger logics with14 nm FinFET technology

Documenti analoghi

• An E band MMIC power amplifier design using 100 nm T‐Gate GaN HEMT on SiC
  di: Liwei Jin, et al.
  Pubblicazione: (2024)
• Battery‐free ultra‐low‐power radio‐frequency receiver for mm‐wave applications using 130‐nm CMOS technology with harvested DC supplies
  di: Marwa Mansour, et al.
  Pubblicazione: (2024)
• High‐throughput in‐memory bitwise computing based on a coupled dual‐SRAM array with independent operands
  di: Hongbiao Wu, et al.
  Pubblicazione: (2024)
• An ultra low‐power double‐node‐upsets hardened latch design
  di: Zhuo Chen, et al.
  Pubblicazione: (2024)
• LC filter optimized design considering the effect on the power converter and capacitor lifetimes
  di: Pedro C. Bolsi, et al.
  Pubblicazione: (2024)