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A 28 Gbps High‐Compensation, Low‐Power CTLE Design for SerDes in 28‐nm CMOS Technology
A 28 Gbps High‐Compensation, Low‐Power CTLE Design for SerDes in 28‐nm CMOS Technology
Fuente:
Wiley Open Access
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Bibliographic Details
Main Authors:
Yaohua Xu
,
Nianjin Ji
,
Yi Wang
Format:
Artículo Open Access
Published:
Wiley
2025
Subjects:
International Journal of Circuit Theory and Applications
Online Access:
Acceder al recurso
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https://onlinelibrary.wiley.com/doi/10.1002/cta.70245
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