Saved in:
| Main Authors: | , , , , , |
|---|---|
| Format: | Recurso digital |
| Language: | English |
| Published: |
Zenodo
2025
|
| Subjects: | |
| Online Access: | https://doi.org/10.5281/zenodo.15024667 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866902083374940160 |
|---|---|
| author | Shrivastava, Shashwat Nikolić, Stefan Tanaka, Sun Ravishankar, Chirag Gaitonde, Dinesh Stojilović, Mirjana |
| author_facet | Shrivastava, Shashwat Nikolić, Stefan Tanaka, Sun Ravishankar, Chirag Gaitonde, Dinesh Stojilović, Mirjana |
| contents | <p>This repository contains the data and software needed to reproduce the results from the paper "<strong>Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox</strong>" by Shashwat Shrivastava (EPFL), Stefan Nikolić (University of Novi Sad), Sun Tanaka (University of Tokyo), Chirag Ravishankar (AMD), Dinesh Gaitonde (AMD), and Mirjana Stojilović (EPFL). The paper has been accepted for publication in the Proceedings of the <strong>33<sup>rd</sup> IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2025)</strong>.</p> <p>The README file details the repository's structure, contents, and instructions for using the provided software and data.</p> <p><strong>Abstract:</strong></p> <p>Routing is one of the major challenges of FPGA compilation. PathFinder is a ubiquitous FPGA routing algorithm used in industry and academia thanks to its ability to adapt to arbitrary routing architectures and user circuits. However, to this day, we do not completely understand why PathFinder works so well and what its limitations are. When a circuit fails to route, it is difficult to pinpoint the problem: architecture or algorithm. Usually, in such cases, either PathFinder is fine-tuned or routing resources are added in the architecture to improve routability, ignoring the exploration of inherent inefficiencies that may exist in PathFinder and further preventing us from designing siliconefficient architectures. In this work, to pinpoint the problem, we construct constrained routing problems where nets have access to limited but specific routing resources that guarantee a legal routing solution. Yet, even with a state-of-the-art implementation, PathFinder fails to find the existing routing solution or any other solution for that matter, highlighting issues in PathFinder solely. The reduced search space makes the underlying behavior more accessible for analysis and reasoning, allowing us to uncover the inefficiency in the current paradigm of PathFinder and propose a solution to fix it. We then transfer the learnings from the constrained to the standard setting, where the search space is not reduced, to show the potential benefits that could be achieved.<strong><br></strong></p> |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_15024667 |
| institution | Zenodo |
| language | eng |
| publishDate | 2025 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox Shrivastava, Shashwat Nikolić, Stefan Tanaka, Sun Ravishankar, Chirag Gaitonde, Dinesh Stojilović, Mirjana FPGA Routing PathFinder Computer-aided design <p>This repository contains the data and software needed to reproduce the results from the paper "<strong>Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox</strong>" by Shashwat Shrivastava (EPFL), Stefan Nikolić (University of Novi Sad), Sun Tanaka (University of Tokyo), Chirag Ravishankar (AMD), Dinesh Gaitonde (AMD), and Mirjana Stojilović (EPFL). The paper has been accepted for publication in the Proceedings of the <strong>33<sup>rd</sup> IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2025)</strong>.</p> <p>The README file details the repository's structure, contents, and instructions for using the provided software and data.</p> <p><strong>Abstract:</strong></p> <p>Routing is one of the major challenges of FPGA compilation. PathFinder is a ubiquitous FPGA routing algorithm used in industry and academia thanks to its ability to adapt to arbitrary routing architectures and user circuits. However, to this day, we do not completely understand why PathFinder works so well and what its limitations are. When a circuit fails to route, it is difficult to pinpoint the problem: architecture or algorithm. Usually, in such cases, either PathFinder is fine-tuned or routing resources are added in the architecture to improve routability, ignoring the exploration of inherent inefficiencies that may exist in PathFinder and further preventing us from designing siliconefficient architectures. In this work, to pinpoint the problem, we construct constrained routing problems where nets have access to limited but specific routing resources that guarantee a legal routing solution. Yet, even with a state-of-the-art implementation, PathFinder fails to find the existing routing solution or any other solution for that matter, highlighting issues in PathFinder solely. The reduced search space makes the underlying behavior more accessible for analysis and reasoning, allowing us to uncover the inefficiency in the current paradigm of PathFinder and propose a solution to fix it. We then transfer the learnings from the constrained to the standard setting, where the search space is not reduced, to show the potential benefits that could be achieved.<strong><br></strong></p> |
| title | Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox |
| topic | FPGA Routing PathFinder Computer-aided design |
| url | https://doi.org/10.5281/zenodo.15024667 |