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| Main Authors: | , |
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| Format: | Recurso digital |
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Zenodo
2025
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| Online Access: | https://doi.org/10.5281/zenodo.15280657 |
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| _version_ | 1866902078189731840 |
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| author | Ludwig, Lucas Lippitz, Markus |
| author_facet | Ludwig, Lucas Lippitz, Markus |
| contents | This repository contains two implementations of a phase-locked loop (PLL) on a FPGA (field-programmable gate array). We use the Labview graphical programming environment to generate FPGA binary code and a PC interface. |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_15280657 |
| institution | Zenodo |
| language | |
| publishDate | 2025 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | PLL on FPGA via Labview Ludwig, Lucas Lippitz, Markus This repository contains two implementations of a phase-locked loop (PLL) on a FPGA (field-programmable gate array). We use the Labview graphical programming environment to generate FPGA binary code and a PC interface. |
| title | PLL on FPGA via Labview |
| url | https://doi.org/10.5281/zenodo.15280657 |