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2025
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| Online Access: | https://doi.org/10.5281/zenodo.17006229 |
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| _version_ | 1866902126600388608 |
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| author | Guan, Hongyi Gao, Yichuan Miao, Chenlu |
| author_facet | Guan, Hongyi Gao, Yichuan Miao, Chenlu |
| contents | <p>This repository contains the code for the paper "EARTH: Efficient Architecture for RISC-V Vector Memory Access".</p> <p>- A processor supports the entire RVV 1.0, based on [saturn-vector](https://github.com/ucb-bar/saturn-vectors)<br>- VLEN & DLEN = 512 bits<br>- Enhance VLSU with Shift Network:<br> - Unit-Stride<br> - Strided<br> - Unit-Stride Segment<br> - Strided Segment</p> |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_17006229 |
| institution | Zenodo |
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| publishDate | 2025 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | EARTH: Efficient Architecture for RISC-V Vector Memory Access Guan, Hongyi Gao, Yichuan Miao, Chenlu <p>This repository contains the code for the paper "EARTH: Efficient Architecture for RISC-V Vector Memory Access".</p> <p>- A processor supports the entire RVV 1.0, based on [saturn-vector](https://github.com/ucb-bar/saturn-vectors)<br>- VLEN & DLEN = 512 bits<br>- Enhance VLSU with Shift Network:<br> - Unit-Stride<br> - Strided<br> - Unit-Stride Segment<br> - Strided Segment</p> |
| title | EARTH: Efficient Architecture for RISC-V Vector Memory Access |
| url | https://doi.org/10.5281/zenodo.17006229 |