Saved in:
| Main Authors: | Parikh, Raj, Parikh, Khushi |
|---|---|
| Format: | Recurso digital |
| Language: | English |
| Published: |
Zenodo
2025
|
| Subjects: | |
| Online Access: | https://doi.org/10.5281/zenodo.17008141 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Siameses: Presentación de un caso
by: Jaime Ingar
Published: (2007)
by: Jaime Ingar
Published: (2007)
Modelo lógico-matemático del Codificador 2D-RS para descripción de hardware en VHDL
by: Cecilia E. Sandoval-Ruiz
Published: (2017)
by: Cecilia E. Sandoval-Ruiz
Published: (2017)
Codificador de fuente programado en VHDL para dispositivos de hardware reconfigurable
by: Cecilia Sandoval
Published: (2006)
by: Cecilia Sandoval
Published: (2006)
Recommender Systems: Learning Collaborative Filtering Similarity Measures Using Siamese Networks
by: Bobadilla, Jesús, et al.
Published: (2026)
by: Bobadilla, Jesús, et al.
Published: (2026)
Manejo de gemelos unidos: experiencia con nueve casos en Medellín, Colombia
by: Mirian Natalia Herrera Toro
Published: (2014)
by: Mirian Natalia Herrera Toro
Published: (2014)
Siameses toracópagos, presentación de un caso
by: Yuvisán Carvajal Núñez
Published: (2012)
by: Yuvisán Carvajal Núñez
Published: (2012)
8-bit softcore microprocessor with dual accumulator designed to be used in FPGA
by: William Sáenz Rodríguez
Published: (2018)
by: William Sáenz Rodríguez
Published: (2018)
INTEGRATION OF LLVM AND ICARUS VERILOG FOR THE COMPILATION AND SIMULATION OF CUSTOM PROCESSORS.
by: Silva, Murillo Inácio da Costa, et al.
Published: (2025)
by: Silva, Murillo Inácio da Costa, et al.
Published: (2025)
Gemelos unidos toracoonfalopagos.
by: Carlos Garcia
Published: (2019)
by: Carlos Garcia
Published: (2019)
A NOVEL DEEP LEARNING METHOD FOR DETECTING CHANGES IN SATELLITE IMAGERY
by: Journal of Theoretical and Applied Information Technology
Published: (2025)
by: Journal of Theoretical and Applied Information Technology
Published: (2025)
CONFIGURATION OF OPERATION MODES FOR A SCINTILLATING FIBER SUB-DETECTOR IN THE LHCb EXPERIMENT
by: Tomás Sierra-Polanco
Published: (2018)
by: Tomás Sierra-Polanco
Published: (2018)
EFFECTS OF A SHORT TERM PLYOMETRIC TRAINING PROGRAM OF AGILITY IN YOUNG BASKETBALL PLAYERS
by: Baljinder Singh Bal
Published: (2011)
by: Baljinder Singh Bal
Published: (2011)
AI based SystemVerilog TB generation
by: Bhavin Shah
Published: (2017)
by: Bhavin Shah
Published: (2017)
FPGA Implementation of Single Precision Floating Point Multiplier using Booth Recoding Algorithm
by: Prince Mishra
Published: (2026)
by: Prince Mishra
Published: (2026)
HW/SW Co-Design of a Specific Accelerator for Robotic Computer Vision
by: Adrian Pedroza de la Crúz
Published: (2015)
by: Adrian Pedroza de la Crúz
Published: (2015)
Herramienta de software para el desarrollo de descripciones de hardware utilizando VHDL a partir de modelos gráficos
by: José Roberto Vargas Rivero
Published: (2010)
by: José Roberto Vargas Rivero
Published: (2010)
Detección de déficits neuromusculares a través del análisis del patrón de salto y aterrizaje en deportistas adolescentes
by: A. Benet-Vigo
Published: (2021)
by: A. Benet-Vigo
Published: (2021)
Sovereign-SNN
by: Montoya Cardenas, Raul
Published: (2026)
by: Montoya Cardenas, Raul
Published: (2026)
Capture of events midi in parallel with FPGAs
by: Adriano de Luca Pennachia
Published: (2004)
by: Adriano de Luca Pennachia
Published: (2004)
Times and Sizes of Jumps in the Mexican Interest Rate
by: José Antonio Núñez Mora
Published: (2008)
by: José Antonio Núñez Mora
Published: (2008)
ANÁLISIS DE LAS ADAPTACIONES INDUCIDAS POR CUATRO SEMANAS DE ENTRENAMIENTO PLIOMÉTRICO
by: D. García López
Published: (2005)
by: D. García López
Published: (2005)
FPGA-based implementation of an S-Box cryptographic co-processor for high-performance applications
by: Moulai Khatir, Ahmed Nassim, et al.
Published: (2025)
by: Moulai Khatir, Ahmed Nassim, et al.
Published: (2025)
Parametric Decimal Division using Hardware Description Language
by: Jorge Hernán López Botero
Published: (2020)
by: Jorge Hernán López Botero
Published: (2020)
MODULACIÓN PWM EN FPGA BASADO EN MÁQUINAS DE ESTADO FINITO
by: DORA MARÍA BALLESTEROS
Published: (2008)
by: DORA MARÍA BALLESTEROS
Published: (2008)
Predicción del deterioro de los componentes metálicos de una Estación Reductora de Presión implementando el método de la cadena de Márkov
by: Jorge Hernán López
Published: (2020)
by: Jorge Hernán López
Published: (2020)
Verification of Universal Asynchronous Receiver and Transmitter (UART) using System Verilog
by: M Srinath, et al.
Published: (2022)
by: M Srinath, et al.
Published: (2022)
RST: Random-Access Hardware Sequence Compression — Artifact
by: Chu, Nolan, et al.
Published: (2026)
by: Chu, Nolan, et al.
Published: (2026)
Flow control design for a flexible and adaptive router in parallel systems
by: A. Jiménez
Published: (2004)
by: A. Jiménez
Published: (2004)
Diseño de un Coprocesador Matemático de Precisión Simple usando el Spartan 3E
by: J. Antonio Álvarez
Published: (2008)
by: J. Antonio Álvarez
Published: (2008)
Controlador difuso parametrizable basado en un núcleo de procesamiento reconfigurable descrito en VHDL
by: Agenor Polo Zabaleta
Published: (2007)
by: Agenor Polo Zabaleta
Published: (2007)
DISEÑO E IMPLEMENTACIÓN DE UN MICROPROCESADOR DE PROPÓSITO ESPECÍFICO
by: JUAN DAVID HINCAPIE ZEA
Published: (2011)
by: JUAN DAVID HINCAPIE ZEA
Published: (2011)
Seguridad en redes. Diseño e implementación de un cifrador de datos por medio de des triple
by: Diego Fernando Rojas Rincòn
Published: (2007)
by: Diego Fernando Rojas Rincòn
Published: (2007)
Pricing Asian power options under jump-fraction process
by: Bin Peng
Published: (2012)
by: Bin Peng
Published: (2012)
UNA IMPLEMENTACIÓN HARDWARE OPTIMIZADA PARA EL OPERADOR EXPONENCIACIÓN MODULAR
by: FREDDY BOLAÑOS
Published: (2008)
by: FREDDY BOLAÑOS
Published: (2008)
Efficient RS (255, k) encoder over reconfigurable systems
by: Cecilia Esperanza Sandoval Ruiz
Published: (2014)
by: Cecilia Esperanza Sandoval Ruiz
Published: (2014)
MICROPROCESADOR DIDÁCTICO DE ARQUITECTURA RISC IMPLEMENTADO EN UN FPGA
by: Víctor H. García Ortega
Published: (2009)
by: Víctor H. García Ortega
Published: (2009)
PARADIPLOMACY, KNOWLEDGE REGIONS AND THE CONSOLIDATION OF “SOFT POWER”
by: Miguel Santos Neves
Published: (2010)
by: Miguel Santos Neves
Published: (2010)
Optimizing Digital Signal Processing with Half-Precision Floating-Point Arithmetic
by: Dr. Elianore Quasar and Dr. Kaia Rykhard
Published: (2019)
by: Dr. Elianore Quasar and Dr. Kaia Rykhard
Published: (2019)
Clasificación de granos de café usando FPGA
by: Jorge Hernández
Published: (2005)
by: Jorge Hernández
Published: (2005)
Desarrollo de un dispositivo digital para la medición de variables ambientales utilizando un arreglo de compuertas programable en campo
by: Juan Carlos Olarte Cortés
Published: (2007)
by: Juan Carlos Olarte Cortés
Published: (2007)
Similar Items
-
Siameses: Presentación de un caso
by: Jaime Ingar
Published: (2007) -
Modelo lógico-matemático del Codificador 2D-RS para descripción de hardware en VHDL
by: Cecilia E. Sandoval-Ruiz
Published: (2017) -
Codificador de fuente programado en VHDL para dispositivos de hardware reconfigurable
by: Cecilia Sandoval
Published: (2006) -
Recommender Systems: Learning Collaborative Filtering Similarity Measures Using Siamese Networks
by: Bobadilla, Jesús, et al.
Published: (2026) -
Manejo de gemelos unidos: experiencia con nueve casos en Medellín, Colombia
by: Mirian Natalia Herrera Toro
Published: (2014)