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| Format: | Recurso digital |
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Zenodo
2025
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| Online Access: | https://doi.org/10.5281/zenodo.17363443 |
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Table of Contents:
- <p>The dataset contains the raw measurements of start-up values of BRAM from multiple AMD Xilinx Zynq boards.</p> <p>BRAM is SRAM that is accessible to the users of an FPGA. Unfortunately, the start-up values of the BRAM are first zeroed out and then overwritten with intial vallues. To mitigate these measures, a series of bitstreams was flashed and the start-up values were recoverd.</p> <p>4 boards were used:</p> <ul> <li>1 TE0802-02-1BEV2-A board with a XCZU1EG-1SBVA484E</li> <li>2 TE0802-02-1AEV2-A boards with a XCZU2CG-1SBVA484E</li> <li>1 ZCU102 Evaluation board with a XCZU9EG-2FFVB1156</li> </ul> <p> </p> <p>This upload contains four files:</p> <ol> <li>start_up_values-default_conditions.hdf5 <ul> <li><span>Start-up values at default conditions (room temperature ~20 °C, previous values all 0, no additional waiting time)</span></li> </ul> </li> <li><span>start_up_values-cold.hdf5</span> <ul> <li><span>Start-up values at ~0 °C </span></li> </ul> </li> <li><span>start_up_values-hot.hdf5</span> <ul> <li><span>Start-up values at ~50 °C</span></li> </ul> </li> <li><span>start_up_values-other_factors.hdf5</span> <ul> <li><span>Start-up values for initial values all 1</span></li> <li><span>Start-up values for additional 10 s before reactivating the BRAM</span></li> </ul> </li> </ol> <p> </p> <p>Version 2: Fix git hashes of used software, so it matches the github repository.</p>