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| Format: | Recurso digital |
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Zenodo
2025
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| Online Access: | https://doi.org/10.5281/zenodo.17808649 |
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Table of Contents:
- <p>8 This note introduces the RHEA-Λ family of reversible logic gates: a binary, ternary, and<br>9 pentary multi-radix gate topology designed for integration into the RHEA-UCM Hamiltonian<br>10 symbolic computation framework. Each Λ-gate is strictly bijective over its finite state space,<br>11 admits a triangular inverse, carries an internal glyph/entropy register, and provides a discrete<br>12 analogue of a measure-preserving Hamiltonian map. The construction does not rely on any<br>13 specific device physics, making it compatible with CMOS, reversible CMOS (RCMOS), adiabatic<br>14 variants, or alternative substrate implementations. This positions the RHEA-Λ gate family as<br>15 a general-purpose reversible primitive for future pentavalent RHEA-IC chips</p>