Thermodynamic Inductive Synthesis: A Physics-Constrained Framework for Energy-Optimal Logic Generation
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| Format: | Recurso digital |
| Language: | English |
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2026
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| _version_ | 1866902000557359104 |
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| author | Vandenberg, Ibrahim |
| author_facet | Vandenberg, Ibrahim |
| contents | <p><span>The fundamental energetic limit of computation is established by Landauer's Principle, which dictates a lower bound of heat generation for every bit of information erased. While modern Inductive Logic Programming (ILP) has achieved significant success in symbolic rule induction, current frameworks remain thermodynamically blind; they optimise for symbolic accuracy while treating physical energy cost as an externality. In the post-Moore era, we argue that a logically valid program that is thermodynamically unviable is fundamentally incorrect for deployment in energy-constrained sovereign environments. </span></p> <p><span>This paper introduces Thermodynamic Inductive Synthesis (TIS), a closed-loop framework that integrates physical entropy production directly into the logic generation process. Presented here is the Fine-Grained Reconfigurable Thermodynamic Substrate (FGRTS), a hardware architecture capable of measuring transient Localised Entropy Production Rate (LEPR) at the gate-cluster level. These measurements serve as a feedback signal for a Gradient-Based Inductive Synthesiser (GBIS), which extends differentiable relaxation techniques to penalise irreversible state changes. </span><span><span>We analytically derive that TIS-generated primitives are projected to reduce irreversible entropy production by approximately 40% compared to standard synthesis baselines, theoretically predicting the spontaneous emergence of quasi-adiabatic logic topologies similar to those predicted by conservative logic theory.</span></span></p> |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_18173079 |
| institution | Zenodo |
| language | eng |
| publishDate | 2026 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | Thermodynamic Inductive Synthesis: A Physics-Constrained Framework for Energy-Optimal Logic Generation Vandenberg, Ibrahim Thermodynamic Computing Inductive Logic Programming Dark Silicon Landauer Limit Reconfigurable Hardware Sovereign AI FGRTS Logic Synthesis <p><span>The fundamental energetic limit of computation is established by Landauer's Principle, which dictates a lower bound of heat generation for every bit of information erased. While modern Inductive Logic Programming (ILP) has achieved significant success in symbolic rule induction, current frameworks remain thermodynamically blind; they optimise for symbolic accuracy while treating physical energy cost as an externality. In the post-Moore era, we argue that a logically valid program that is thermodynamically unviable is fundamentally incorrect for deployment in energy-constrained sovereign environments. </span></p> <p><span>This paper introduces Thermodynamic Inductive Synthesis (TIS), a closed-loop framework that integrates physical entropy production directly into the logic generation process. Presented here is the Fine-Grained Reconfigurable Thermodynamic Substrate (FGRTS), a hardware architecture capable of measuring transient Localised Entropy Production Rate (LEPR) at the gate-cluster level. These measurements serve as a feedback signal for a Gradient-Based Inductive Synthesiser (GBIS), which extends differentiable relaxation techniques to penalise irreversible state changes. </span><span><span>We analytically derive that TIS-generated primitives are projected to reduce irreversible entropy production by approximately 40% compared to standard synthesis baselines, theoretically predicting the spontaneous emergence of quasi-adiabatic logic topologies similar to those predicted by conservative logic theory.</span></span></p> |
| title | Thermodynamic Inductive Synthesis: A Physics-Constrained Framework for Energy-Optimal Logic Generation |
| topic | Thermodynamic Computing Inductive Logic Programming Dark Silicon Landauer Limit Reconfigurable Hardware Sovereign AI FGRTS Logic Synthesis |
| url | https://doi.org/10.5281/zenodo.18173079 |