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Development of Verification Infrastructure to Validate RAM Low Power Features at Unit Level
Development of Verification Infrastructure to Validate RAM Low Power Features at Unit Level
Fuente:
Zenodo
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Bibliographic Details
Main Authors:
Vibha Narayan R
,
Sujatha Hiremath
Format:
Recurso digital
Published:
Zenodo
2022
Subjects:
Low power methodology
power gating
SRAM
low power verification.
Online Access:
Acceder al recurso
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