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Development of Verification Infrastructure to Validate RAM Low Power Features at Unit Level

Fuente: Zenodo

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Detalles Bibliográficos
Autores principales:	Vibha Narayan R, Sujatha Hiremath
Formato:	Recurso digital
Publicado:	Zenodo 2022
Materias:	Low power methodology power gating SRAM low power verification.
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

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