chaobrain/brainevent: Version 0.0.7
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2026
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| _version_ | 1866901688104779776 |
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| author | Chaoming Wang Sichao He Minghao Wang xinzhu-L |
| author_facet | Chaoming Wang Sichao He Minghao Wang xinzhu-L |
| contents | <p>This release optimizes CUDA kernel performance.</p> <h2>Added</h2> <ul> <li><strong>CUDA kernel compilation pipeline (<code>cuda_raw</code> backend)</strong>: Native nvcc-based compilation system. Compile <code>.cu</code> files on-the-fly with source-hash caching, automatic XLA FFI registration, and multi-dtype dispatch (f16, bf16, f32, f64). Key APIs: <code>load_cuda_file</code>, <code>load_cuda_inline</code>, <code>load_cuda_dir</code>, <code>load_cpp_file</code>, <code>load_cpp_inline</code> (#88)</li> <li><strong>BitPacked binary event representations</strong>: <code>BitPackedBinary</code> compresses 32 spike values into a single uint32 word (32x memory reduction). <code>CompactBinary</code> combines bitpacking with stream compaction to skip inactive rows in scatter kernels. Factory methods: <code>BitPackedBinary.from_array(x)</code>, <code>CompactBinary.from_array(x)</code>, and standalone <code>bitpack()</code> utility (#97)</li> <li><strong>BitPack FCN kernels</strong>: <code>bitpack_binary_fcnmv</code>, <code>bitpack_binary_fcnmm</code>, <code>compact_binary_fcnmv</code>, <code>compact_binary_fcnmm</code> with both Numba CPU and CUDA GPU backends for event-driven matmul on packed spike representations (#97)</li> <li><strong>Parallel RNN training (<code>brainevent.pararnn</code>)</strong>: O(log T) parallel training via Newton's method and parallel prefix reduction. Includes <code>parallel_rnn()</code> single-function API, <code>AutoRNNCell</code> with automatic Jacobian structure detection (diagonal, block-diagonal, dense), pre-built cells (<code>GRUDiagMH</code>, <code>LSTMCIFGDiagMH</code>), fused CUDA kernels for GRU/LSTM forward and backward passes, and configurable Newton solver (#85)</li> <li><strong>Warp kernel support</strong> for CSR matrix-vector multiplication and various binary/sparse operations across COO, CSR, Dense, and FCN modules (#86)</li> <li><strong>Shared CUDA headers</strong> (<code>brainevent/include/</code>): <code>common.h</code> (<code>BE::Tensor</code>, <code>BE::DType</code>, error-check macros), <code>cuda_common.h</code> (warp reductions, dtype macros, atomics), <code>dispatch.h</code> (type dispatch macros) for consistent CUDA kernel development</li> <li><strong>CUDA compilation diagnostics</strong>: <code>print_diagnostics()</code>, <code>get_cache_dir()</code>, <code>set_cache_dir()</code>, <code>clear_cache()</code> for cache management; <code>CompiledModule</code>, <code>register_ffi_target</code>, <code>list_registered_targets</code> for FFI target management</li> <li>Tutorials for custom GPU operators with Warp and Numba CUDA (#83)</li> </ul> <h2>Changed</h2> <ul> <li><strong>CUDA raw as default GPU backend</strong>: All operations (COO, CSR, Dense, FCN, JIT*) now default to <code>cuda_raw</code> backend on GPU, with automatic fallback to numba/pallas when CUDA is unavailable (#94)</li> <li><strong>Namespace migration</strong>: <code>brainevent.kernix</code> namespace moved into <code>brainevent._op</code> and re-exported directly under <code>brainevent.*</code> (e.g., <code>brainevent.load_cuda_file</code>). Old <code>kernix</code> namespace removed (#96)</li> <li><strong>Backend rename</strong>: <code>"tvmffi"</code> backend renamed to <code>"cuda_raw"</code> throughout the codebase (#87, #96)</li> <li><strong>Versioned cache directory</strong>: Compiled kernel cache moved from <code>~/.cache/brainevent/</code> to <code>~/.cache/brainevent/<version>/</code> to prevent cross-version incompatibilities</li> <li><strong>FCN kernel launch optimization</strong>: Scatter/gather kernels switched from block-per-row (<code><<<n_pre, 256>>></code>) to thread-per-row (<code><<<ceil(n_pre/256), 256>>></code>) strategy for moderate n_conn (33–512), yielding up to 6.4x speedup on COBA benchmarks (#84, #97)</li> <li><strong>FCN interface streamlining</strong>: Unified <code>fcnmv</code>/<code>fcnmm</code> dispatch to optimal kernel based on input type (dense, bitpacked, or compact) (#96)</li> <li><strong>JAX >= 0.9.1 compatibility</strong>: Added JAX Zero init helper and refactored JVP utilities for forward compatibility (#93)</li> <li><strong>JIT/CSR CUDA module splitting</strong>: Reorganized CUDA kernel files for JIT and CSR operations into separate modules with updated Warp kernel implementations (#86)</li> </ul> <h2>Removed</h2> <ul> <li><code>sparse_float</code> module and all related operations</li> <li><code>IndexedBinary1d</code>, <code>IndexedBinary2d</code>, <code>IndexedSpFloat1d</code>, <code>IndexedSpFloat2d</code> classes (replaced by bitpack/compact representations)</li> <li><code>brainevent.kernix</code> namespace (absorbed into <code>brainevent._op</code>, re-exported at top level)</li> <li><code>ell_mv</code> function (superseded by FCN operations)</li> </ul> <h2>Fixed</h2> <ul> <li><strong>Binary FCN CUDA kernel correctness</strong>: Fixed kernel launch parameter issues causing incorrect results in scatter/gather operations (#87)</li> <li><strong>Warp tile operation bug in JIT modules</strong>: Cooperative tile ops produced diagonal-like output when launch dimensions < 32; replaced with scalar loops (#86)</li> <li><strong>CSR matrix-vector multiplication tolerance</strong>: Enhanced assertion tolerance for numerical stability in tests</li> </ul> <h2>What's Changed</h2> <ul> <li>Docs: Add tutorials for Warp, Numba CUDA, and Numba CPU operators by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/83</li> <li>perf: implementing cuda kernels for most operators by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/84</li> <li>feat: add parallel RNN support by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/85</li> <li>Refactor: Split JIT/CSR CUDA modules and update Warp kernels by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/86</li> <li>Refactor: Extract TVM FFI module and fix binary FCN CUDA kernels by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/87</li> <li>feat: introduce CUDA kernel compilation pipeline with <code>cuda_raw</code> backend by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/88</li> <li>Docs: Rename kernix docs to kernel and update tutorials by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/90</li> <li>Feat: Add JAX Zero init helper and refactor JVP utilities by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/93</li> <li>Refactor: Make CUDA raw kernels default GPU backend for ops by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/94</li> <li>chore: add Apache License information by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/95</li> <li>refactor: migrate to kernix namespace, remove sparse_float, and streamline fcnmv/fcnmm interfaces by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/96</li> <li>feat: bitpack binary representations, FCNMM/FCNMV kernel enhancements, and public API cleanup by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/97</li> </ul> <p><strong>Full Changelog</strong>: https://github.com/chaobrain/brainevent/compare/v0.0.6...v0.0.7</p> |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_18963114 |
| institution | Zenodo |
| language | |
| publishDate | 2026 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | chaobrain/brainevent: Version 0.0.7 Chaoming Wang Sichao He Minghao Wang xinzhu-L <p>This release optimizes CUDA kernel performance.</p> <h2>Added</h2> <ul> <li><strong>CUDA kernel compilation pipeline (<code>cuda_raw</code> backend)</strong>: Native nvcc-based compilation system. Compile <code>.cu</code> files on-the-fly with source-hash caching, automatic XLA FFI registration, and multi-dtype dispatch (f16, bf16, f32, f64). Key APIs: <code>load_cuda_file</code>, <code>load_cuda_inline</code>, <code>load_cuda_dir</code>, <code>load_cpp_file</code>, <code>load_cpp_inline</code> (#88)</li> <li><strong>BitPacked binary event representations</strong>: <code>BitPackedBinary</code> compresses 32 spike values into a single uint32 word (32x memory reduction). <code>CompactBinary</code> combines bitpacking with stream compaction to skip inactive rows in scatter kernels. Factory methods: <code>BitPackedBinary.from_array(x)</code>, <code>CompactBinary.from_array(x)</code>, and standalone <code>bitpack()</code> utility (#97)</li> <li><strong>BitPack FCN kernels</strong>: <code>bitpack_binary_fcnmv</code>, <code>bitpack_binary_fcnmm</code>, <code>compact_binary_fcnmv</code>, <code>compact_binary_fcnmm</code> with both Numba CPU and CUDA GPU backends for event-driven matmul on packed spike representations (#97)</li> <li><strong>Parallel RNN training (<code>brainevent.pararnn</code>)</strong>: O(log T) parallel training via Newton's method and parallel prefix reduction. Includes <code>parallel_rnn()</code> single-function API, <code>AutoRNNCell</code> with automatic Jacobian structure detection (diagonal, block-diagonal, dense), pre-built cells (<code>GRUDiagMH</code>, <code>LSTMCIFGDiagMH</code>), fused CUDA kernels for GRU/LSTM forward and backward passes, and configurable Newton solver (#85)</li> <li><strong>Warp kernel support</strong> for CSR matrix-vector multiplication and various binary/sparse operations across COO, CSR, Dense, and FCN modules (#86)</li> <li><strong>Shared CUDA headers</strong> (<code>brainevent/include/</code>): <code>common.h</code> (<code>BE::Tensor</code>, <code>BE::DType</code>, error-check macros), <code>cuda_common.h</code> (warp reductions, dtype macros, atomics), <code>dispatch.h</code> (type dispatch macros) for consistent CUDA kernel development</li> <li><strong>CUDA compilation diagnostics</strong>: <code>print_diagnostics()</code>, <code>get_cache_dir()</code>, <code>set_cache_dir()</code>, <code>clear_cache()</code> for cache management; <code>CompiledModule</code>, <code>register_ffi_target</code>, <code>list_registered_targets</code> for FFI target management</li> <li>Tutorials for custom GPU operators with Warp and Numba CUDA (#83)</li> </ul> <h2>Changed</h2> <ul> <li><strong>CUDA raw as default GPU backend</strong>: All operations (COO, CSR, Dense, FCN, JIT*) now default to <code>cuda_raw</code> backend on GPU, with automatic fallback to numba/pallas when CUDA is unavailable (#94)</li> <li><strong>Namespace migration</strong>: <code>brainevent.kernix</code> namespace moved into <code>brainevent._op</code> and re-exported directly under <code>brainevent.*</code> (e.g., <code>brainevent.load_cuda_file</code>). Old <code>kernix</code> namespace removed (#96)</li> <li><strong>Backend rename</strong>: <code>"tvmffi"</code> backend renamed to <code>"cuda_raw"</code> throughout the codebase (#87, #96)</li> <li><strong>Versioned cache directory</strong>: Compiled kernel cache moved from <code>~/.cache/brainevent/</code> to <code>~/.cache/brainevent/<version>/</code> to prevent cross-version incompatibilities</li> <li><strong>FCN kernel launch optimization</strong>: Scatter/gather kernels switched from block-per-row (<code><<<n_pre, 256>>></code>) to thread-per-row (<code><<<ceil(n_pre/256), 256>>></code>) strategy for moderate n_conn (33–512), yielding up to 6.4x speedup on COBA benchmarks (#84, #97)</li> <li><strong>FCN interface streamlining</strong>: Unified <code>fcnmv</code>/<code>fcnmm</code> dispatch to optimal kernel based on input type (dense, bitpacked, or compact) (#96)</li> <li><strong>JAX >= 0.9.1 compatibility</strong>: Added JAX Zero init helper and refactored JVP utilities for forward compatibility (#93)</li> <li><strong>JIT/CSR CUDA module splitting</strong>: Reorganized CUDA kernel files for JIT and CSR operations into separate modules with updated Warp kernel implementations (#86)</li> </ul> <h2>Removed</h2> <ul> <li><code>sparse_float</code> module and all related operations</li> <li><code>IndexedBinary1d</code>, <code>IndexedBinary2d</code>, <code>IndexedSpFloat1d</code>, <code>IndexedSpFloat2d</code> classes (replaced by bitpack/compact representations)</li> <li><code>brainevent.kernix</code> namespace (absorbed into <code>brainevent._op</code>, re-exported at top level)</li> <li><code>ell_mv</code> function (superseded by FCN operations)</li> </ul> <h2>Fixed</h2> <ul> <li><strong>Binary FCN CUDA kernel correctness</strong>: Fixed kernel launch parameter issues causing incorrect results in scatter/gather operations (#87)</li> <li><strong>Warp tile operation bug in JIT modules</strong>: Cooperative tile ops produced diagonal-like output when launch dimensions < 32; replaced with scalar loops (#86)</li> <li><strong>CSR matrix-vector multiplication tolerance</strong>: Enhanced assertion tolerance for numerical stability in tests</li> </ul> <h2>What's Changed</h2> <ul> <li>Docs: Add tutorials for Warp, Numba CUDA, and Numba CPU operators by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/83</li> <li>perf: implementing cuda kernels for most operators by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/84</li> <li>feat: add parallel RNN support by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/85</li> <li>Refactor: Split JIT/CSR CUDA modules and update Warp kernels by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/86</li> <li>Refactor: Extract TVM FFI module and fix binary FCN CUDA kernels by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/87</li> <li>feat: introduce CUDA kernel compilation pipeline with <code>cuda_raw</code> backend by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/88</li> <li>Docs: Rename kernix docs to kernel and update tutorials by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/90</li> <li>Feat: Add JAX Zero init helper and refactor JVP utilities by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/93</li> <li>Refactor: Make CUDA raw kernels default GPU backend for ops by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/94</li> <li>chore: add Apache License information by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/95</li> <li>refactor: migrate to kernix namespace, remove sparse_float, and streamline fcnmv/fcnmm interfaces by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/96</li> <li>feat: bitpack binary representations, FCNMM/FCNMV kernel enhancements, and public API cleanup by @chaoming0625 in https://github.com/chaobrain/brainevent/pull/97</li> </ul> <p><strong>Full Changelog</strong>: https://github.com/chaobrain/brainevent/compare/v0.0.6...v0.0.7</p> |
| title | chaobrain/brainevent: Version 0.0.7 |
| url | https://doi.org/10.5281/zenodo.18963114 |