Wzorek, P. (2025). Hardware-accelerated event-graph neural networks for low-latency time-series classification on SoC FPGA. Zenodo.
Chicago Style (17th ed.) CitationWzorek, Piotr. Hardware-accelerated Event-graph Neural Networks for Low-latency Time-series Classification on SoC FPGA. Zenodo, 2025.
MLA (9th ed.) CitationWzorek, Piotr. Hardware-accelerated Event-graph Neural Networks for Low-latency Time-series Classification on SoC FPGA. Zenodo, 2025.
Warning: These citations may not always be 100% accurate.