Enhancing Network-on-Chip Design with Modern Simulation Tools
Fuente:
Zenodo
Enregistré dans:
| Auteurs principaux: | , |
|---|---|
| Format: | Recurso digital |
| Publié: |
Zenodo
2020
|
| Sujets: | |
| Accès en ligne: | |
| Tags: |
Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
|
| _version_ | 1866901476028186624 |
|---|---|
| author | Dr. Ammar Khalid Al-Turk Dr. Nalini Ramesh Rao |
| author_facet | Dr. Ammar Khalid Al-Turk Dr. Nalini Ramesh Rao |
| contents | <p>—The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication</p> |
| format | Recurso digital |
| id | zenodo_https___doi_org_10_5281_zenodo_19318984 |
| institution | Zenodo |
| language | |
| publishDate | 2020 |
| publisher | Zenodo |
| record_format | zenodo |
| spellingShingle | Enhancing Network-on-Chip Design with Modern Simulation Tools Dr. Ammar Khalid Al-Turk Dr. Nalini Ramesh Rao Network-on-Chip System-on-Chip embedded systems computer architecture. <p>—The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication</p> |
| title | Enhancing Network-on-Chip Design with Modern Simulation Tools |
| topic | Network-on-Chip System-on-Chip embedded systems computer architecture. |
| url | https://doi.org/10.5281/zenodo.19318984 |