APA (7th ed.) Citation

Wang, P., Guan, W., Liang, L., Wang, Z., Luo, H., & Zhang, Z. (2025). SpeedLLM: An FPGA Co-design of Large Language Model Inference Accelerator.

Chicago Style (17th ed.) Citation

Wang, Peipei, Wu Guan, Liping Liang, Zhijun Wang, Hanqing Luo, and Zhibin Zhang. SpeedLLM: An FPGA Co-design of Large Language Model Inference Accelerator. 2025.

MLA (9th ed.) Citation

Wang, Peipei, et al. SpeedLLM: An FPGA Co-design of Large Language Model Inference Accelerator. 2025.